From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1DD2C6FD1D for ; Mon, 20 Mar 2023 13:19:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wmmhy5GpdnljoGuUHoYeYcZlfvmCzw8n7cc15UYvXXI=; b=2LcnHyvjgNEivj UK5/bC7Z0wIa6VnIlLfTgW1/OmGjCbi/b6BnZEJIKl6oJzM7VVLquSjyWEdb1IUlYmCW4l0Vkqa8v Wu0HghbzTfFHlsL4ZCK4fakeuX4SCtRkZvfwy6Go1QLfkoMiQ64ixwoeWTkKY4j2kDRTTvgRq7IpY h8CeDKGak5PauPalQZNA65OokxJxqJJ7G11OtgiLl0mbpsvMPb+acgCzNLI0aDuNPhpXqcVoNzGrj +p4ZMSksUPu5hT03iQWT9wvcuR5F5vTPzQjvIiL9L09vJ/ziCxWpntjl0CMwy8cA53GB9Pdq5bmJw lTWOhT4LvIE2u2H6F+qg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1peFPm-0095sO-1b; Mon, 20 Mar 2023 13:19:06 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1peFPe-0095n3-0T for linux-arm-kernel@lists.infradead.org; Mon, 20 Mar 2023 13:19:00 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6AA966148D; Mon, 20 Mar 2023 13:18:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 334F5C433EF; Mon, 20 Mar 2023 13:18:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1679318336; bh=cvW3K10cwPJIDxWFtbNkAbwAJgpniljdex/6gIjaLzQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Raut2jiVj+WCR59pnkSIXHt22gC5JhjIi4TRNgqALDmu5ha+R9VX8LDEk8pQDUj+r Jo3vEH6duYCfVrVGzQLz2g3ZZCFxM798NoATF49ifPS4dZ8HnIEDbVe1uobtTj6ERV hyUVpbLZvv+v9wV9ajJ+WzHJCETl0AqD73g+zS0gD9lPfOwtW5Mjkev5P6+xsAl4yQ cK4pK3bCQ4/x7DamNngZijudee/S5TGFDCWXNLR4H4iBsjppXh9YDV0kqnSHdIyI6P uXrYeyu2R9Lhu2pGvYlT/AcA04K+qWkwciNi9TD/o6sHnJcUPi576Kk+HLe9Qxkw4L qFWm8GYq/Uonw== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Frederic Weisbecker , Guenter Roeck , Peter Zijlstra , Linus Walleij , Arnd Bergmann Subject: [PATCH v4 02/12] ARM: vfp: Pass successful return address via register R3 Date: Mon, 20 Mar 2023 14:18:35 +0100 Message-Id: <20230320131845.3138015-3-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320131845.3138015-1-ardb@kernel.org> References: <20230320131845.3138015-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3246; i=ardb@kernel.org; h=from:subject; bh=cvW3K10cwPJIDxWFtbNkAbwAJgpniljdex/6gIjaLzQ=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUUiVs1MO/v/hxwdY82lGwOWPrYT09uqv2HVd7nMRPnrj p1GTpkdpSwMYhwMsmKKLAKz/77beXqiVK3zLFmYOaxMIEMYuDgFYCKrFzIyXBR/oFgdszz924qk gKYL92o010+a833y7u18Vv8Wp4UWn2L4H5pmxmA6w3lRiQ5Ladu8tDN7tlTeS1lY1LP/1DnrO7o ObAA= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230320_061858_260991_EB337820 X-CRM114-Status: GOOD ( 17.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for reimplementing the do_vfp()->vfp_support_entry() handover in C code, switch to using R3 to pass the 'success' return address, rather than R9, as it cannot be used for parameter passing. Signed-off-by: Ard Biesheuvel Reviewed-by: Linus Walleij Tested-by: Guenter Roeck --- arch/arm/vfp/entry.S | 1 + arch/arm/vfp/vfphw.S | 14 +++++++------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index cfedc2a3dbd68f1c..6dabb47617781a5f 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -23,6 +23,7 @@ @ ENTRY(do_vfp) mov r1, r10 + mov r3, r9 ldr r4, .LCvfp ldr pc, [r4] @ call VFP entry point ENDPROC(do_vfp) diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 6d056d810e4868c2..60acd42e05786e95 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -7,7 +7,7 @@ * * This code is called from the kernel's undefined instruction trap. * r1 holds the thread_info pointer - * r9 holds the return address for successful handling. + * r3 holds the return address for successful handling. * lr holds the return address for unrecognised instructions. * sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h) */ @@ -71,7 +71,7 @@ @ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) @ r1 = thread_info pointer @ r2 = PC value to resume execution after successful emulation -@ r9 = normal "successful" return address +@ r3 = normal "successful" return address @ lr = unrecognised instruction return address @ IRQs enabled. ENTRY(vfp_support_entry) @@ -89,9 +89,9 @@ ENTRY(vfp_support_entry) bne look_for_VFP_exceptions @ VFP is already enabled DBGSTR1 "enable %x", r10 - ldr r3, vfp_current_hw_state_address + ldr r9, vfp_current_hw_state_address orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set - ldr r4, [r3, r11, lsl #2] @ vfp_current_hw_state pointer + ldr r4, [r9, r11, lsl #2] @ vfp_current_hw_state pointer bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled cmp r4, r10 @ this thread owns the hw context? #ifndef CONFIG_SMP @@ -150,7 +150,7 @@ vfp_reload_hw: #endif DBGSTR1 "load state %p", r10 - str r10, [r3, r11, lsl #2] @ update the vfp_current_hw_state pointer + str r10, [r9, r11, lsl #2] @ update the vfp_current_hw_state pointer @ Load the saved state back into the VFP VFPFLDMIA r10, r5 @ reload the working registers while @ FPEXC is in a safe state @@ -180,7 +180,7 @@ vfp_hw_state_valid: @ always subtract 4 from the following @ instruction address. local_bh_enable_ti r10, r4 - ret r9 @ we think we have handled things + ret r3 @ we think we have handled things look_for_VFP_exceptions: @@ -210,7 +210,7 @@ skip: process_exception: DBGSTR "bounce" mov r2, sp @ nothing stacked - regdump is at TOS - mov lr, r9 @ setup for a return to the user code. + mov lr, r3 @ setup for a return to the user code. @ Now call the C code to package up the bounce to the support code @ r0 holds the trigger instruction -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel