From: Will Deacon <will@kernel.org>
To: Jiucheng Xu <jiucheng.xu@amlogic.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Kelvin Zhang <kelvin.zhang@amlogic.com>,
Chris Healy <cphealy@gmail.com>, Chris Healy <healych@amazon.com>,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] perf/amlogic: Fix large number of counter issue
Date: Mon, 27 Mar 2023 15:10:55 +0100 [thread overview]
Message-ID: <20230327141054.GC31752@willie-the-truck> (raw)
In-Reply-To: <20230209115403.521868-2-jiucheng.xu@amlogic.com>
On Thu, Feb 09, 2023 at 07:54:02PM +0800, Jiucheng Xu wrote:
> When use 1ms interval, very large number of counter happens
> once in a while as below:
>
> 25.968654513 281474976710655.84 MB meson_ddr_bw/chan_1_rw_bytes,arm=1/
> 26.118657346 281474976710655.88 MB meson_ddr_bw/chan_1_rw_bytes,arm=1/
> 26.180137180 281474976710655.66 MB meson_ddr_bw/chan_1_rw_bytes,arm=1/
>
> Root cause is the race between irq handler
> and pmu.read callback. Use spin lock to protect the sw&hw
> counters.
>
> Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
> ---
> drivers/perf/amlogic/meson_ddr_pmu_core.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/perf/amlogic/meson_ddr_pmu_core.c b/drivers/perf/amlogic/meson_ddr_pmu_core.c
> index 0b24dee1ed3c..9b2e5d5c0626 100644
> --- a/drivers/perf/amlogic/meson_ddr_pmu_core.c
> +++ b/drivers/perf/amlogic/meson_ddr_pmu_core.c
> @@ -14,6 +14,7 @@
> #include <linux/perf_event.h>
> #include <linux/platform_device.h>
> #include <linux/printk.h>
> +#include <linux/spinlock.h>
> #include <linux/sysfs.h>
> #include <linux/types.h>
>
> @@ -23,6 +24,7 @@ struct ddr_pmu {
> struct pmu pmu;
> struct dmc_info info;
> struct dmc_counter counters; /* save counters from hw */
> + spinlock_t lock; /* protect hw/sw counter */
> bool pmu_enabled;
> struct device *dev;
> char *name;
> @@ -92,10 +94,12 @@ static void meson_ddr_perf_event_update(struct perf_event *event)
> int idx;
> int chann_nr = pmu->info.hw_info->chann_nr;
>
> + spin_lock(&pmu->lock);
Why doesn't this need the _irqsave() variant if we're racing with the irq
handler?
Will
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next prev parent reply other threads:[~2023-03-27 14:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-09 11:54 [PATCH 1/3] perf/amlogic: Fix config1/config2 parsing issue Jiucheng Xu
2023-02-09 11:54 ` [PATCH 2/3] perf/amlogic: Fix large number of counter issue Jiucheng Xu
2023-03-27 14:10 ` Will Deacon [this message]
2023-03-28 2:29 ` Jiucheng Xu
2023-03-28 11:55 ` Will Deacon
2023-02-09 11:54 ` [PATCH 3/3] arm64: defconfig: Add Meson DDR PMU as build-in Jiucheng Xu
2023-02-10 15:58 ` Chris Healy
2023-03-27 15:01 ` [PATCH 1/3] perf/amlogic: Fix config1/config2 parsing issue Will Deacon
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