From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Alexandru Elisei <alexandru.elisei@arm.com>,
Andre Przywara <andre.przywara@arm.com>,
Chase Conklin <chase.conklin@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
Darren Hart <darren@os.amperecomputing.com>,
Jintack Lim <jintack@cs.columbia.edu>,
Russell King <rmk+kernel@armlinux.org.uk>,
Miguel Luis <miguel.luis@oracle.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v9 06/50] KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2
Date: Wed, 5 Apr 2023 16:39:24 +0100 [thread overview]
Message-ID: <20230405154008.3552854-7-maz@kernel.org> (raw)
In-Reply-To: <20230405154008.3552854-1-maz@kernel.org>
From: Christoffer Dall <christoffer.dall@linaro.org>
When running in virtual EL2 mode, we actually run the hardware in EL1
and therefore have to use the EL1 registers to ensure correct operation.
By setting the HCR.TVM and HCR.TVRM we ensure that the virtual EL2 mode
doesn't shoot itself in the foot when setting up what it believes to be
a different mode's system register state (for example when preparing to
switch to a VM).
We can leverage the existing sysregs infrastructure to support trapped
accesses to these registers.
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/hyp/include/hyp/switch.h | 4 +---
arch/arm64/kvm/hyp/nvhe/switch.c | 2 +-
arch/arm64/kvm/hyp/vhe/switch.c | 7 ++++++-
arch/arm64/kvm/sys_regs.c | 19 ++++++++++++++++---
4 files changed, 24 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index c41166f1a1dd..f7bc6f1a4e0b 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -119,10 +119,8 @@ static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu)
}
}
-static inline void ___activate_traps(struct kvm_vcpu *vcpu)
+static inline void ___activate_traps(struct kvm_vcpu *vcpu, u64 hcr)
{
- u64 hcr = vcpu->arch.hcr_el2;
-
if (cpus_have_final_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM))
hcr |= HCR_TVM;
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index c2cb46ca4fb6..efac8fbe0b20 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -40,7 +40,7 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
{
u64 val;
- ___activate_traps(vcpu);
+ ___activate_traps(vcpu, vcpu->arch.hcr_el2);
__activate_traps_common(vcpu);
val = vcpu->arch.cptr_el2;
diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index cd3f3117bf16..c8da8d350453 100644
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -35,9 +35,14 @@ DEFINE_PER_CPU(unsigned long, kvm_hyp_vector);
static void __activate_traps(struct kvm_vcpu *vcpu)
{
+ u64 hcr = vcpu->arch.hcr_el2;
u64 val;
- ___activate_traps(vcpu);
+ /* Trap VM sysreg accesses if an EL2 guest is not using VHE. */
+ if (vcpu_is_el2(vcpu) && !vcpu_el2_e2h_is_set(vcpu))
+ hcr |= HCR_TVM | HCR_TRVM;
+
+ ___activate_traps(vcpu, hcr);
val = read_sysreg(cpacr_el1);
val |= CPACR_ELx_TTA;
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 3311a6d822ee..5dc158c39baa 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -391,8 +391,15 @@ static void get_access_mask(const struct sys_reg_desc *r, u64 *mask, u64 *shift)
/*
* Generic accessor for VM registers. Only called as long as HCR_TVM
- * is set. If the guest enables the MMU, we stop trapping the VM
- * sys_regs and leave it in complete control of the caches.
+ * is set.
+ *
+ * This is set in two cases: either (1) we're running at vEL2, or (2)
+ * we're running at EL1 and the guest has its MMU off.
+ *
+ * (1) TVM/TRVM is set, as we need to virtualise some of the VM
+ * registers for the guest hypervisor
+ * (2) Once the guest enables the MMU, we stop trapping the VM sys_regs
+ * and leave it in complete control of the caches.
*/
static bool access_vm_reg(struct kvm_vcpu *vcpu,
struct sys_reg_params *p,
@@ -401,7 +408,13 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu,
bool was_enabled = vcpu_has_cache_enabled(vcpu);
u64 val, mask, shift;
- BUG_ON(!p->is_write);
+ /* We don't expect TRVM on the host */
+ BUG_ON(!vcpu_is_el2(vcpu) && !p->is_write);
+
+ if (!p->is_write) {
+ p->regval = vcpu_read_sys_reg(vcpu, r->reg);
+ return true;
+ }
get_access_mask(r, &mask, &shift);
--
2.34.1
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next prev parent reply other threads:[~2023-04-05 15:41 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-05 15:39 [PATCH v9 00/50] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 01/50] KVM: arm64: nv: Add non-VHE-EL2->EL1 translation helpers Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 02/50] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg() Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 03/50] KVM: arm64: nv: Handle SPSR_EL2 specially Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 04/50] KVM: arm64: nv: Handle HCR_EL2.E2H specially Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 05/50] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2023-04-05 15:39 ` Marc Zyngier [this message]
2023-04-05 15:39 ` [PATCH v9 07/50] KVM: arm64: nv: Trap CPACR_EL1 access in virtual EL2 Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 08/50] KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 09/50] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP,FPEN} settings Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 10/50] KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 11/50] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 12/50] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 13/50] KVM: arm64: nv: Forward debug traps to the nested guest Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 14/50] KVM: arm64: nv: Configure HCR_EL2 for nested virtualization Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 15/50] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 16/50] KVM: arm64: nv: Implement nested Stage-2 page table walk logic Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 17/50] KVM: arm64: nv: Handle shadow stage 2 page faults Marc Zyngier
2023-05-02 9:35 ` Ganapatrao Kulkarni
2023-04-05 15:39 ` [PATCH v9 18/50] KVM: arm64: nv: Restrict S2 RD/WR permissions to match the guest's Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 19/50] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 20/50] KVM: arm64: nv: Set a handler for the system instruction traps Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 21/50] KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2 Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 22/50] KVM: arm64: nv: Trap and emulate TLBI " Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 23/50] KVM: arm64: nv: Fold guest's HCR_EL2 configuration into the host's Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 24/50] KVM: arm64: nv: Hide RAS from nested guests Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 25/50] KVM: arm64: nv: Add handling of EL2-specific timer registers Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 26/50] KVM: arm64: nv: Forward timer traps to nested EL2 Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 27/50] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 28/50] KVM: arm64: nv: Nested GICv3 Support Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 29/50] KVM: arm64: nv: Don't load the GICv4 context on entering a nested guest Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 30/50] KVM: arm64: nv: vgic: Emulate the HW bit in software Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 31/50] KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 32/50] KVM: arm64: nv: Implement maintenance interrupt forwarding Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 33/50] KVM: arm64: nv: Deal with broken VGIC on maintenance interrupt delivery Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 34/50] KVM: arm64: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 35/50] KVM: arm64: nv: Add handling of FEAT_TTL TLB invalidation Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 36/50] KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 37/50] KVM: arm64: nv: Tag shadow S2 entries with nested level Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 38/50] KVM: arm64: nv: Add include containing the VNCR_EL2 offsets Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 39/50] KVM: arm64: nv: Map VNCR-capable registers to a separate page Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 40/50] KVM: arm64: nv: Move nested vgic state into the sysreg file Marc Zyngier
2023-04-05 15:39 ` [PATCH v9 41/50] KVM: arm64: Add FEAT_NV2 cpu feature Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 42/50] KVM: arm64: nv: Sync nested timer state with FEAT_NV2 Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 43/50] KVM: arm64: nv: Fold GICv3 host trapping requirements into guest setup Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 44/50] KVM: arm64: nv: Publish emulated timer interrupt state in the in-memory state Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 45/50] KVM: arm64: nv: Allocate VNCR page when required Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 46/50] KVM: arm64: nv: Enable ARMv8.4-NV support Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 47/50] KVM: arm64: nv: Fast-track 'InHost' exception returns Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 48/50] KVM: arm64: nv: Fast-track EL1 TLBIs for VHE guests Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 49/50] KVM: arm64: nv: Use FEAT_ECV to trap access to EL0 timers Marc Zyngier
2023-04-05 15:40 ` [PATCH v9 50/50] KVM: arm64: nv: Accelerate EL0 timer read accesses when FEAT_ECV is on Marc Zyngier
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