From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 259FBC7618D for ; Thu, 6 Apr 2023 16:45:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7/x0hgyJAVvv1solmsiEsazREat+cWp+39vQd5UFVW8=; b=N8D7RIhLcBP/mL S2FJgWoBq2RWGZRPF5zoVfQ1LDewQ/7AfaU5H0GM2WXW+sAxgPrsFuBSI9+I7ouTOzx5r7IB9AWVB fqvPCcCwZxXp6NCY5aa5F0VS2kz9H0FxQN4T3ZEgms1LookxUtQP7MqrWNt36NYdt8gnvBXgyS09b XkG+ExM5iYcnj7nooW/w1EIk0NRKtlyQwEbEyV6yHKFlE1oYDECumAXXLKgJ7S/AVvQHdw1QRRKyD W95Wy55fTkXeYRVw4Okkrw1TFi5M6Ay4ipD4vW9TIzZe2uzS4fs5KG08PcN59srz1N0HSUgyksgFv XVtowgfdg/QEv3C7Rceg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pkSjI-0082fM-14; Thu, 06 Apr 2023 16:44:56 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pkSjE-0082e9-2Z for linux-arm-kernel@lists.infradead.org; Thu, 06 Apr 2023 16:44:54 +0000 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.207]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4PsnNg5F7Sz6J6fV; Fri, 7 Apr 2023 00:42:43 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Thu, 6 Apr 2023 17:44:46 +0100 Date: Thu, 6 Apr 2023 17:44:45 +0100 From: Jonathan Cameron To: Peter Zijlstra CC: Yicong Yang , Mark Rutland , Ingo Molnar , "Arnaldo Carvalho de Melo" , Will Deacon , , , , , , Dan Williams , Shaokun Zhang , Jiucheng Xu , "Khuong Dinh" , Robert Richter , Atish Patra , Anup Patel , "Andy Gross" , Bjorn Andersson , Frank Li , Shuai Xue , Vineet Gupta , Shawn Guo , Fenghua Yu , Dave Jiang , Wu Hao , Tom Rix , , Suzuki K Poulose , Liang Kan Subject: Re: [PATCH 01/32] perf: Allow a PMU to have a parent Message-ID: <20230406174445.0000235c@Huawei.com> In-Reply-To: <20230406124040.GD392176@hirez.programming.kicks-ass.net> References: <20230404134225.13408-1-Jonathan.Cameron@huawei.com> <20230404134225.13408-2-Jonathan.Cameron@huawei.com> <61f8e489-ae76-38d6-2da0-43cf3c17853d@huawei.com> <20230406111607.00007be5@Huawei.com> <20230406124040.GD392176@hirez.programming.kicks-ass.net> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500006.china.huawei.com (7.191.161.198) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230406_094452_976764_D3F44592 X-CRM114-Status: GOOD ( 14.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 6 Apr 2023 14:40:40 +0200 Peter Zijlstra wrote: > On Thu, Apr 06, 2023 at 11:16:07AM +0100, Jonathan Cameron wrote: > > > In the long run I agree it would be good. Short term there are more instances of > > struct pmu that don't have parents than those that do (even after this series). > > We need to figure out what to do about those before adding checks on it being > > set. > > Right, I don't think you've touched *any* of the x86 PMUs for example, > and getting everybody that boots an x86 kernel a warning isn't going to > go over well :-) > It was tempting :) "Warning: Parentless PMU: try a different architecture." I'd love some inputs on what the x86 PMU devices parents should be? CPU counters in general tend to just spin out of deep in the architecture code. My overall favorite is an l2 cache related PMU that is spun up in arch/arm/kernel/irq.c init_IRQ() I'm just not going to try and figure out why... Jonathan _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel