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From: Joey Gouly <joey.gouly@arm.com>
To: <linux-arm-kernel@lists.infradead.org>
Cc: <nd@arm.com>, <broonie@kernel.org>, <catalin.marinas@arm.com>,
	<james.morse@arm.com>, <joey.gouly@arm.com>,
	<mark.rutland@arm.com>, <maz@kernel.org>,
	<oliver.upton@linux.dev>, <suzuki.poulose@arm.com>,
	<will@kernel.org>, <yuzenghui@huawei.com>
Subject: [PATCH v2 15/19] arm64: add encodings of PIRx_ELx registers
Date: Thu, 13 Apr 2023 12:05:09 +0100	[thread overview]
Message-ID: <20230413110513.243326-16-joey.gouly@arm.com> (raw)
In-Reply-To: <20230413110513.243326-1-joey.gouly@arm.com>

The encodings used in the permission indirection registers means that the
values that Linux puts in the PTEs do not need to be changed.

The E0 values are replicated in E1, with the execute permissions removed.
This is needed as the futex operations access user mappings with privileged
loads/stores.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/include/asm/pgtable-hwdef.h |  8 ++++++++
 arch/arm64/include/asm/pgtable-prot.h  | 24 ++++++++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index f658aafc47df..11c81e700335 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -170,6 +170,14 @@
 #define PTE_ATTRINDX(t)		(_AT(pteval_t, (t)) << 2)
 #define PTE_ATTRINDX_MASK	(_AT(pteval_t, 7) << 2)
 
+/*
+ * PIIndex[3:0] encoding (Permission Indirection Extension)
+ */
+#define PTE_PI_IDX_0	6
+#define PTE_PI_IDX_1	51
+#define PTE_PI_IDX_2	53
+#define PTE_PI_IDX_3	54
+
 /*
  * Memory Attribute override for Stage-2 (MemAttr[3:0])
  */
diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
index a45af0a22b25..f5a6de8588b2 100644
--- a/arch/arm64/include/asm/pgtable-prot.h
+++ b/arch/arm64/include/asm/pgtable-prot.h
@@ -107,4 +107,28 @@ extern bool arm64_use_ng_mappings;
 
 #endif /* __ASSEMBLY__ */
 
+#define pte_pi_index(pte) ( \
+	((pte & BIT(PTE_PI_IDX_3)) >> (PTE_PI_IDX_3 - 3)) | \
+	((pte & BIT(PTE_PI_IDX_2)) >> (PTE_PI_IDX_2 - 2)) | \
+	((pte & BIT(PTE_PI_IDX_1)) >> (PTE_PI_IDX_1 - 1)) | \
+	((pte & BIT(PTE_PI_IDX_0)) >> (PTE_PI_IDX_0 - 0)))
+
+#define PIE_E0	( \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY),      PIE_X_O) | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX)  | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC),   PIE_RWX) | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY),      PIE_R)   | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED),        PIE_RW))
+
+#define PIE_E1	( \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY),      PIE_NONE_O) | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R)      | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC),   PIE_RW)     | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY),      PIE_R)      | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED),        PIE_RW)     | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_ROX),    PIE_RX)     | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_EXEC),   PIE_RWX)    | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_RO),     PIE_R)      | \
+	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL),        PIE_RW))
+
 #endif /* __ASM_PGTABLE_PROT_H */
-- 
2.25.1


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  parent reply	other threads:[~2023-04-13 11:21 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 11:04 [PATCH v2 00/19] Permission Indirection Extension Joey Gouly
2023-04-13 11:04 ` [PATCH v2 01/19] arm64/sysreg: Add ID register ID_AA64MMFR3 Joey Gouly
2023-04-13 11:14   ` Mark Brown
2023-04-13 11:25     ` Joey Gouly
2023-04-13 16:13   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 02/19] arm64/sysreg: add system registers TCR2_ELx Joey Gouly
2023-04-13 16:14   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 03/19] arm64/sysreg: update HCRX_EL2 register Joey Gouly
2023-04-13 11:20   ` Mark Brown
2023-04-13 16:14   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 04/19] arm64/sysreg: add PIR*_ELx registers Joey Gouly
2023-04-13 16:15   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 05/19] arm64: cpufeature: add system register ID_AA64MMFR3 Joey Gouly
2023-04-13 11:05 ` [PATCH v2 06/19] arm64: cpufeature: add TCR2 cpucap Joey Gouly
2023-04-13 11:25   ` Mark Brown
2023-04-13 11:05 ` [PATCH v2 07/19] arm64: cpufeature: add Permission Indirection Extension cpucap Joey Gouly
2023-04-13 11:30   ` Mark Brown
2023-04-13 11:05 ` [PATCH v2 08/19] KVM: arm64: Save/restore TCR2_EL1 Joey Gouly
2023-04-20  9:13   ` Marc Zyngier
2023-04-20 14:11     ` Joey Gouly
2023-04-13 11:05 ` [PATCH v2 09/19] KVM: arm64: Save/restore PIE registers Joey Gouly
2023-04-20  8:36   ` Marc Zyngier
2023-04-13 11:05 ` [PATCH v2 10/19] KVM: arm64: expose ID_AA64MMFR3_EL1 to guests Joey Gouly
2023-04-13 16:15   ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 11/19] arm64: add PTE_UXN/PTE_WRITE to SWAPPER_*_FLAGS Joey Gouly
2023-04-13 16:35   ` Catalin Marinas
2023-04-20 15:29     ` Joey Gouly
2023-04-21  7:52       ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 12/19] arm64: add PTE_WRITE to PROT_SECT_NORMAL Joey Gouly
2023-04-13 11:05 ` [PATCH v2 13/19] arm64: reorganise PAGE_/PROT_ macros Joey Gouly
2023-04-13 11:05 ` [PATCH v2 14/19] arm64: disable EL2 traps for PIE Joey Gouly
2023-04-13 16:42   ` Catalin Marinas
2023-04-13 11:05 ` Joey Gouly [this message]
2023-04-18 14:02   ` [PATCH v2 15/19] arm64: add encodings of PIRx_ELx registers Mark Brown
2023-04-13 11:05 ` [PATCH v2 16/19] arm64: enable Permission Indirection Extension (PIE) Joey Gouly
2023-04-13 11:05 ` [PATCH v2 17/19] arm64: transfer permission indirection settings to EL2 Joey Gouly
2023-04-13 11:05 ` [PATCH v2 18/19] arm64: Document boot requirements for PIE Joey Gouly
2023-04-13 11:45   ` Mark Brown
2023-04-13 16:45   ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 19/19] KVM: selftests: get-reg-list: add Permission Indirection registers Joey Gouly
2023-04-13 16:43   ` Catalin Marinas
2023-04-13 18:04   ` Mark Brown

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