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From: Joey Gouly <joey.gouly@arm.com>
To: <linux-arm-kernel@lists.infradead.org>
Cc: <nd@arm.com>, <broonie@kernel.org>, <catalin.marinas@arm.com>,
	<james.morse@arm.com>, <joey.gouly@arm.com>,
	<mark.rutland@arm.com>, <maz@kernel.org>,
	<oliver.upton@linux.dev>, <suzuki.poulose@arm.com>,
	<will@kernel.org>, <yuzenghui@huawei.com>
Subject: [PATCH v2 18/19] arm64: Document boot requirements for PIE
Date: Thu, 13 Apr 2023 12:05:12 +0100	[thread overview]
Message-ID: <20230413110513.243326-19-joey.gouly@arm.com> (raw)
In-Reply-To: <20230413110513.243326-1-joey.gouly@arm.com>

Features PIE and TCR2 introduce new registers, update the trap requirements
for these features.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
---
 Documentation/arm64/booting.rst | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
index ffeccdd6bdac..babbf36f0ce2 100644
--- a/Documentation/arm64/booting.rst
+++ b/Documentation/arm64/booting.rst
@@ -379,6 +379,32 @@ Before jumping into the kernel, the following conditions must be met:
 
     - SMCR_EL2.EZT0 (bit 30) must be initialised to 0b1.
 
+  For CPUs with the Extended Translation Control Register feature (FEAT_TCR2):
+
+  - If EL3 is present:
+
+    - SCR_EL3.TCR2En (bit 43) must be initialised to 0b1.
+
+ - If the kernel is entered at EL1 and EL2 is present:
+
+    - HCRX_EL2.TCR2En (bit 14) must be initialised to 0b1.
+
+  For CPUs with the Stage 1 Permission Indirection Extension feature (FEAT_S1PIE):
+
+  - If EL3 is present:
+
+    - SCR_EL3.PIEn (bit 45) must be initialised to 0b1.
+
+  - If the kernel is entered at EL1 and EL2 is present:
+
+    - HFGRTR_EL2.nPIR_EL1 (bit 58) must be initialised to 0b1.
+
+    - HFGWTR_EL2.nPIR_EL1 (bit 58) must be initialised to 0b1.
+
+    - HFGRTR_EL2.nPIRE0_EL1 (bit 57) must be initialised to 0b1.
+
+    - HFGRWR_EL2.nPIRE0_EL1 (bit 57) must be initialised to 0b1.
+
 The requirements described above for CPU mode, caches, MMUs, architected
 timers, coherency and system registers apply to all CPUs.  All CPUs must
 enter the kernel in the same exception level.  Where the values documented
-- 
2.25.1


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  parent reply	other threads:[~2023-04-13 11:07 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 11:04 [PATCH v2 00/19] Permission Indirection Extension Joey Gouly
2023-04-13 11:04 ` [PATCH v2 01/19] arm64/sysreg: Add ID register ID_AA64MMFR3 Joey Gouly
2023-04-13 11:14   ` Mark Brown
2023-04-13 11:25     ` Joey Gouly
2023-04-13 16:13   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 02/19] arm64/sysreg: add system registers TCR2_ELx Joey Gouly
2023-04-13 16:14   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 03/19] arm64/sysreg: update HCRX_EL2 register Joey Gouly
2023-04-13 11:20   ` Mark Brown
2023-04-13 16:14   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 04/19] arm64/sysreg: add PIR*_ELx registers Joey Gouly
2023-04-13 16:15   ` Catalin Marinas
2023-04-13 11:04 ` [PATCH v2 05/19] arm64: cpufeature: add system register ID_AA64MMFR3 Joey Gouly
2023-04-13 11:05 ` [PATCH v2 06/19] arm64: cpufeature: add TCR2 cpucap Joey Gouly
2023-04-13 11:25   ` Mark Brown
2023-04-13 11:05 ` [PATCH v2 07/19] arm64: cpufeature: add Permission Indirection Extension cpucap Joey Gouly
2023-04-13 11:30   ` Mark Brown
2023-04-13 11:05 ` [PATCH v2 08/19] KVM: arm64: Save/restore TCR2_EL1 Joey Gouly
2023-04-20  9:13   ` Marc Zyngier
2023-04-20 14:11     ` Joey Gouly
2023-04-13 11:05 ` [PATCH v2 09/19] KVM: arm64: Save/restore PIE registers Joey Gouly
2023-04-20  8:36   ` Marc Zyngier
2023-04-13 11:05 ` [PATCH v2 10/19] KVM: arm64: expose ID_AA64MMFR3_EL1 to guests Joey Gouly
2023-04-13 16:15   ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 11/19] arm64: add PTE_UXN/PTE_WRITE to SWAPPER_*_FLAGS Joey Gouly
2023-04-13 16:35   ` Catalin Marinas
2023-04-20 15:29     ` Joey Gouly
2023-04-21  7:52       ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 12/19] arm64: add PTE_WRITE to PROT_SECT_NORMAL Joey Gouly
2023-04-13 11:05 ` [PATCH v2 13/19] arm64: reorganise PAGE_/PROT_ macros Joey Gouly
2023-04-13 11:05 ` [PATCH v2 14/19] arm64: disable EL2 traps for PIE Joey Gouly
2023-04-13 16:42   ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 15/19] arm64: add encodings of PIRx_ELx registers Joey Gouly
2023-04-18 14:02   ` Mark Brown
2023-04-13 11:05 ` [PATCH v2 16/19] arm64: enable Permission Indirection Extension (PIE) Joey Gouly
2023-04-13 11:05 ` [PATCH v2 17/19] arm64: transfer permission indirection settings to EL2 Joey Gouly
2023-04-13 11:05 ` Joey Gouly [this message]
2023-04-13 11:45   ` [PATCH v2 18/19] arm64: Document boot requirements for PIE Mark Brown
2023-04-13 16:45   ` Catalin Marinas
2023-04-13 11:05 ` [PATCH v2 19/19] KVM: selftests: get-reg-list: add Permission Indirection registers Joey Gouly
2023-04-13 16:43   ` Catalin Marinas
2023-04-13 18:04   ` Mark Brown

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