From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB40CC6FD18 for ; Tue, 25 Apr 2023 12:28:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=d0n9a+t1wE2a3iFOlJEKQciUwBEkJgPtrKWvCFY0JQc=; b=pS0JYlOrAg8PhH bcj7pDlAifZy0OTmdd16DssBVuXtjZN2TEfZ2VRHq6QUJPtfe0o2WV84WrVIvkagD218nmq1/8sR0 QhEqZu3s3c2OAIPDISeOimOhFWaRyb7BwdfOXtZbOcmu+Wgf6bo5IrACYUfEpn1ow7etlRF6lTd/b G2c0JlRv6x/d3I1c/FmSoopJqlcMkbaV2SnaWMih6gt8xx9t/TL2WD/zhg4MtjU+VDRivU8zN2BWB u6O8cPm2bV3WHsUSZhoGMzsffZOgg4nT/NEPHzIJkPBXGLW62zULIi7tfYEdCnTkmG4RpONdLVaKu dqzQ3kQL7ul71WrbldaQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1prHlw-0014g4-1X; Tue, 25 Apr 2023 12:27:52 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1prHlt-0014fG-1o for linux-arm-kernel@lists.infradead.org; Tue, 25 Apr 2023 12:27:51 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33PCRisC031241; Tue, 25 Apr 2023 07:27:44 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1682425664; bh=ipiUSnmA2+1WIk0HkySkOwI9+HpDpHtuOrmd8pbEBQc=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=LLp1TG/LTVkyTJODVxQ+iFjnO3CPPNMSoeDoAVMxXeIctcGbRg8ekE6Mpl+ULZwE5 rS9btWwaEwvbNy8KOWRhjcTbWoVgTrC+MXSQiOteBWfE96Fv0MG9obqyDKQ09EYron 4P9po4zePwbPWNDHaAoy++qK5me5+dmXQoWKJx3o= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33PCRifO023020 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Apr 2023 07:27:44 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Tue, 25 Apr 2023 07:27:44 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 25 Apr 2023 07:27:44 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33PCRiG5111194; Tue, 25 Apr 2023 07:27:44 -0500 Date: Tue, 25 Apr 2023 07:27:44 -0500 From: Nishanth Menon To: Andrew Davis CC: Krzysztof Kozlowski , Rob Herring , Vignesh Raghavendra , , , , Tero Kristo , , Subject: Re: [PATCH 3/3] arm64: dts: ti: k3-j7200-mcu-wakeup: Split fss node up Message-ID: <20230425122744.hkahpv6yvprd6qzy@creature> References: <20230424173623.477577-1-nm@ti.com> <20230424173623.477577-4-nm@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230425_052749_682600_26D176AA X-CRM114-Status: GOOD ( 22.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 13:55-20230424, Andrew Davis wrote: > On 4/24/23 12:36 PM, Nishanth Menon wrote: > > fss node claims to be entirely a syscon node, but it is really two > > parts of it - one a syscon that controls the hbmc mux and a simple bus > > where ospi, hbmc peripherals are located. So model it accordingly by > > splitting the node up and using ti,j721e-system-controller to describe > > the syscon > > > > Signed-off-by: Nishanth Menon > > --- > > .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 21 +++++++++++++------ > > 1 file changed, 15 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > > index b58a31371bf3..7653cb191be1 100644 > > --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > > +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > > @@ -338,18 +338,27 @@ mcu_spi2: spi@40320000 { > > status = "disabled"; > > }; > > - fss: syscon@47000000 { > > - compatible = "syscon", "simple-mfd"; > > + hbmc_syscon: syscon@47000000 { > > + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > > reg = <0x00 0x47000000 0x00 0x100>; > > - #address-cells = <2>; > > - #size-cells = <2>; > > - ranges; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0x00 0x00 0x47000000 0x100>; > > - hbmc_mux: hbmc-mux { > > + hbmc_mux: mux-controller@4 { > > compatible = "mmio-mux"; > > + reg = <0x4 0x2>; > > #mux-control-cells = <1>; > > mux-reg-masks = <0x4 0x2>; /* HBMC select */ > > }; > > + }; > > + > > + fss: bus@47030000 { > > + compatible = "simple-bus"; > > + reg = <0x0 0x47030000 0x0 0x100>; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > hbmc: hyperbus@47034000 { > > compatible = "ti,am654-hbmc"; > > > I hope all the things you had to do here show you what I mean in my > comments on [0] :) yup. > > I've posted a first step patch that allows "reg-mux" node to work with > regular reg properties[1]. Which means this patch could have been just this: > > --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > @@ -305,15 +305,16 @@ wkup_i2c0: i2c@42120000 { > status = "disabled"; > }; > - fss: syscon@47000000 { > - compatible = "syscon", "simple-mfd"; > + fss: bus@47000000 { > + compatible = "simple-bus"; > reg = <0x00 0x47000000 0x00 0x100>; > #address-cells = <2>; > #size-cells = <2>; > ranges; > hbmc_mux: hbmc-mux { > - compatible = "mmio-mux"; > + compatible = "reg-mux"; > + reg = <0x00 0x47000004 0x00 0x2>; > #mux-control-cells = <1>; > mux-reg-masks = <0x4 0x2>; /* HBMC select */ > }; > > Andrew > > [0] https://lore.kernel.org/all/76da0b98-3274-b047-db11-ecabc117ae11@ti.com/ > [1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/ yes, this is a better approach. Lets see the conclusion of the discussion. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel