From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0C9C0C7618E for ; Wed, 26 Apr 2023 13:01:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tu//j7nu+6IYlZmQTN6eP3JQHXdQbfyjDQdJZzye1ak=; b=wtErU4wVho1NpH Jm3QCXCn2g991JK3nq3EnnEwihLKArHLBTbmM97DNRONOrMBeQvtgJMQeqIQizZQmpJ8IoeEevzBv ZLWycO/8++hb8JEr4gZjtE/egaZgbjli42xuFIQsmS1HLelytNdIHjT8W9NVCqmlxt0iQvty0nslD 21TRG1sJ/aoia9QgMWDkgSF2atFWVMsUaL35yQbZzjGLSO23R0psqW4Qxe+KmfWTT6ZV/qJk72JDv 8ilNftY05mZ9KOdq/e3AoWAxKxaE/bJV0CJUFqxEY6YLZRsP2iNsH4E+J8xAa3DIPSwKuS6QTuIbP AXnzYVeq7G7ElzGkNaVQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1prekt-004019-14; Wed, 26 Apr 2023 13:00:19 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1prekq-003zzt-1d for linux-arm-kernel@lists.infradead.org; Wed, 26 Apr 2023 13:00:18 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33QD05Ci125065; Wed, 26 Apr 2023 08:00:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1682514005; bh=wiW9f5kEGIZOdhv65NPZZhUfzkCiHCggcMupW4U+RKc=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=REld0+ntgXr+p+QzvAAy/lbwJy0XONe0QHEX/P6sJAlgmC/Tk/g/szMUBtgk8K7W3 Kuu+yrBNvqMkf1SqVVI2qjc5/ekvfTs+Xm9Hz1NucrMtuThEQXNkuZf2FmBmQy8Bmw z+oaWM9DPrikUE8lOvyp/TA0zYxlmU+UviRpnRwI= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33QD058O054620 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 26 Apr 2023 08:00:05 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 26 Apr 2023 08:00:05 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 26 Apr 2023 08:00:05 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33QD04Mf032294; Wed, 26 Apr 2023 08:00:04 -0500 Date: Wed, 26 Apr 2023 08:00:03 -0500 From: Nishanth Menon To: Siddharth Vadapalli CC: , , , , , , , , , Subject: Re: [RFC PATCH 2/2] arm64: dts: ti: k3-j721s2: Add overlay to enable main CPSW2G with GESI Message-ID: <20230426130003.q2fotsm3b5r7hh27@ominous> References: <20230426105718.118806-1-s-vadapalli@ti.com> <20230426105718.118806-3-s-vadapalli@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230426105718.118806-3-s-vadapalli@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230426_060016_628946_BC0BB22B X-CRM114-Status: GOOD ( 20.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16:27-20230426, Siddharth Vadapalli wrote: > From: Kishon Vijay Abraham I > > The MAIN CPSW2G instance of CPSW on J721S2 SoC can be enabled with the GESI > Expansion Board connected to the J7 Common-Proc-Board. Use the overlay > to enable this. > > Add alias for the MAIN CPSW2G port to enable kernel to fetch MAC address > directly from U-Boot. > > Signed-off-by: Kishon Vijay Abraham I > Signed-off-by: Siddharth Vadapalli > --- > arch/arm64/boot/dts/ti/Makefile | 2 + > .../dts/ti/k3-j721s2-evm-gesi-exp-board.dtso | 83 +++++++++++++++++++ > 2 files changed, 85 insertions(+) > create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index c83c9d772b81..13db9b8dbe1d 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb > # Boards with J721s2 SoC > dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb > dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb > +dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo > > # Boards with J784s4 SoC > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > @@ -49,3 +50,4 @@ dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb > > # Enable support for device-tree overlays > DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ > +DTC_FLAGS_k3-j721s2-common-proc-board += -@ > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso > new file mode 100644 > index 000000000000..2ec08754bf04 > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso > @@ -0,0 +1,83 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/** > + * DT Overlay for MAIN CPSW2G using GESI Expansion Board with J7 common processor board. > + * product link please. > + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include > +#include > + > +#include "k3-pinctrl.h" > + > +&{/} { > + aliases { > + ethernet1 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1"; > + }; > +}; > + > +&main_pmx0 { > + main_cpsw_mdio_pins_default: main-cpsw-mdio-pins-default { > + pinctrl-single,pins = < > + J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */ > + J721S2_IOPAD(0x0bc, PIN_INPUT, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */ > + >; > + }; > + > + rgmii1_pins_default: rgmii1-pins-default { > + pinctrl-single,pins = < > + J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */ > + J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */ > + J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */ > + J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */ > + J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */ > + J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */ > + J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */ > + J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */ > + J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */ > + J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */ > + J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */ > + J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */ > + >; > + }; > +}; > + > +&exp1 { > + p15 { > + /* P15 - EXP_MUX2 */ > + gpio-hog; > + gpios = <13 GPIO_ACTIVE_HIGH>; > + output-high; > + line-name = "EXP_MUX2"; > + }; > +}; > + > +&main_cpsw { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii1_pins_default>; > +}; > + > +&main_cpsw_mdio { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&main_cpsw_mdio_pins_default>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + main_cpsw_phy0: ethernet-phy@0 { > + reg = <0>; > + ti,rx-internal-delay = ; > + ti,fifo-depth = ; > + ti,min-output-impedance; > + }; > +}; > + > +&main_cpsw_port1 { > + status = "okay"; > + phy-mode = "rgmii-rxid"; > + phy-handle = <&main_cpsw_phy0>; > +}; > -- > 2.25.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel