From: Sascha Hauer <s.hauer@pengutronix.de>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pengutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>
Subject: Re: [PATCH v4 08/21] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines
Date: Wed, 17 May 2023 12:51:59 +0200 [thread overview]
Message-ID: <20230517105159.GW29365@pengutronix.de> (raw)
In-Reply-To: <20230516165455.00002f5b@Huawei.com>
On Tue, May 16, 2023 at 04:54:55PM +0100, Jonathan Cameron wrote:
> On Fri, 5 May 2023 13:38:43 +0200
> Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
> > The DDRTYPE defines are named to be RK3399 specific, but they can be
> > used for other Rockchip SoCs as well, so replace the RK3399_PMUGRF_
> > prefix with ROCKCHIP_. They are defined in a SoC specific header
> > file, so when generalizing the prefix also move the new defines to
> > a SoC agnostic header file. While at it use GENMASK to define the
> > DDRTYPE bitfield and give it a name including the full register name.
>
> Great - you covered this one a few patches later.
>
> A few suggestions inline but this looks basically fine to me.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > ---
> > drivers/devfreq/event/rockchip-dfi.c | 10 ++++++----
> > drivers/devfreq/rk3399_dmc.c | 10 +++++-----
> > include/soc/rockchip/rk3399_grf.h | 7 +------
> > include/soc/rockchip/rockchip_grf.h | 15 +++++++++++++++
> > 4 files changed, 27 insertions(+), 15 deletions(-)
> > create mode 100644 include/soc/rockchip/rockchip_grf.h
> >
> > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
> > index 18d578730fd0c..7896cd8beb143 100644
> > --- a/drivers/devfreq/event/rockchip-dfi.c
> > +++ b/drivers/devfreq/event/rockchip-dfi.c
> > @@ -18,7 +18,10 @@
> > #include <linux/list.h>
> > #include <linux/of.h>
> > #include <linux/of_device.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/bits.h>
>
> Why bits.h?
For GENMASK.
It's included indirectly anyway, but being explicit shouldn't hurt.
>
> >
> > +#include <soc/rockchip/rockchip_grf.h>
> > #include <soc/rockchip/rk3399_grf.h>
> >
> > #define DMC_MAX_CHANNELS 2
> > @@ -74,9 +77,9 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
> > writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
> >
> > /* set ddr type to dfi */
> > - if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
> > + if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
> > writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
> > - else if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
> > + else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
> > writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
>
> Maybe a switch statement here as well? In particular I'm interested
> that there is no sign of DDR3 or LPDDR2 here and I think it would be good to
> make that explicit given it's defined.
That's done later in this series, but you already noticed that.
> > diff --git a/include/soc/rockchip/rockchip_grf.h b/include/soc/rockchip/rockchip_grf.h
> > new file mode 100644
> > index 0000000000000..dc77bb762a05a
> > --- /dev/null
> > +++ b/include/soc/rockchip/rockchip_grf.h
> > @@ -0,0 +1,15 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Rockchip General Register Files definitions
> > + */
> > +
> > +#ifndef __SOC_ROCKCHIP_GRF_H
> > +#define __SOC_ROCKCHIP_GRF_H
> > +
> > +/* Rockchip DDRTYPE defines */
> > +#define ROCKCHIP_DDRTYPE_DDR3 3
> > +#define ROCKCHIP_DDRTYPE_LPDDR2 5
> > +#define ROCKCHIP_DDRTYPE_LPDDR3 6
> > +#define ROCKCHIP_DDRTYPE_LPDDR4 7
>
> Maybe worth an enum so you can give ddr_type a named type and
> the compiler can see if you've handled all the cases for
> the switch statements?
Ok, will do.
Sascha
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next prev parent reply other threads:[~2023-05-17 12:00 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 11:38 [PATCH v4 00/21] Add perf support to the rockchip-dfi driver Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 01/21] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer
2023-05-07 10:08 ` Heiko Stübner
2023-05-16 15:12 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 02/21] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer
2023-05-07 10:22 ` Heiko Stübner
2023-05-16 15:27 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 03/21] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer
2023-05-16 15:33 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 04/21] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer
2023-05-16 15:40 ` Jonathan Cameron
2023-05-17 9:20 ` Sascha Hauer
2023-05-17 10:19 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 05/21] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer
2023-05-16 15:43 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 06/21] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer
2023-05-16 15:48 ` Jonathan Cameron
2023-05-17 9:29 ` Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 07/21] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer
2023-05-16 15:50 ` Jonathan Cameron
2023-05-17 9:33 ` Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 08/21] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer
2023-05-16 15:54 ` Jonathan Cameron
2023-05-17 10:51 ` Sascha Hauer [this message]
2023-05-05 11:38 ` [PATCH v4 09/21] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer
2023-05-16 16:01 ` Jonathan Cameron
2023-05-17 11:11 ` Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 10/21] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer
2023-05-16 16:04 ` Jonathan Cameron
2023-05-17 11:38 ` Sascha Hauer
2023-05-17 14:46 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 11/21] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer
2023-05-16 16:06 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 12/21] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer
2023-05-16 16:09 ` Jonathan Cameron
2023-05-19 6:14 ` Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 13/21] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer
2023-05-16 16:10 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 14/21] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer
2023-05-16 16:16 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 15/21] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer
[not found] ` <71827018-8e29-2966-380b-66ddfdcd3668@arm.com>
2023-05-16 15:27 ` Sascha Hauer
[not found] ` <20230510195634.GH29365@pengutronix.de>
2023-05-16 15:39 ` Sascha Hauer
2023-05-17 10:53 ` Jonathan Cameron
2023-05-17 14:26 ` Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 16/21] PM / devfreq: rockchip-dfi: make register stride SoC specific Sascha Hauer
2023-05-16 16:18 ` Jonathan Cameron
2023-05-19 6:45 ` Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 17/21] PM / devfreq: rockchip-dfi: account for multiple DDRMON_CTRL registers Sascha Hauer
2023-05-17 10:23 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 18/21] PM / devfreq: rockchip-dfi: add support for RK3588 Sascha Hauer
2023-05-17 10:24 ` Jonathan Cameron
2023-05-05 11:38 ` [PATCH v4 19/21] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 20/21] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer
2023-05-05 11:38 ` [PATCH v4 21/21] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer
2023-05-05 16:29 ` Krzysztof Kozlowski
2023-05-05 16:31 ` Krzysztof Kozlowski
2023-05-05 16:38 ` [PATCH v4 00/21] Add perf support to the rockchip-dfi driver Vincent Legoll
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