Re: [PATCH v4 1/5] mtd: rawnand: meson: fix command sequence for read/write

Miquel Raynal
2023-05-22T15:06:03Z

Hi Arseniy,

AVKrasnov@sberdevices.ru wrote on Mon, 15 May 2023 12:44:35 +0300:

> This fixes read/write functionality by:
> 1) Changing NFC_CMD_RB_INT bit value.

I guess this is a separate fix

> 2) Adding extra NAND_CMD_STATUS command on each r/w request.

Is this really needed? Looks like you're delaying the next op only. Is
using a delay enough? If yes, then it's probably the wrong approach.

> 3) Adding extra idle commands during r/w request.

Question about this below, might also be a patch on its own?

> 4) Adding extra NAND_CMD_READ0 on each read request.
>
> Without this patch driver works unstable, for example there are a lot
> of ECC errors.

I believe all the fixes should be Cc'ed to stable, please add in your
commits:

Cc: stable@...

>
> Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller")
> Suggested-by: Liang Yang <liang.yang@amlogic.com>
> Signed-off-by: Arseniy Krasnov <AVKrasnov@sberdevices.ru>
> ---
> drivers/mtd/nand/raw/meson_nand.c | 30 +++++++++++++++++++++---------
> 1 file changed, 21 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
> index 074e14225c06..2f4d8c84186b 100644
> --- a/drivers/mtd/nand/raw/meson_nand.c
> +++ b/drivers/mtd/nand/raw/meson_nand.c
> @@ -37,7 +37,7 @@
> #define NFC_CMD_SCRAMBLER_ENABLE BIT(19)
> #define NFC_CMD_SCRAMBLER_DISABLE 0
> #define NFC_CMD_SHORTMODE_DISABLE 0
> -#define NFC_CMD_RB_INT BIT(14)
> +#define NFC_CMD_RB_INT ((0xb << 10) | BIT(18) | BIT(16))
>
> #define NFC_CMD_GET_SIZE(x) (((x) >> 22) & GENMASK(4, 0))
>
> @@ -392,7 +392,7 @@ static void meson_nfc_set_data_oob(struct nand_chip *nand,
> }
> }
>
> -static int meson_nfc_queue_rb(struct meson_nfc *nfc, int timeout_ms)
> +static int meson_nfc_queue_rb(struct meson_nfc *nfc, int timeout_ms, int cmd_read0)
> {
> u32 cmd, cfg;
> int ret = 0;
> @@ -407,17 +407,29 @@ static int meson_nfc_queue_rb(struct meson_nfc *nfc, int timeout_ms)
>
> reinit_completion(&nfc->completion);
>
> + cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_STATUS;
> + writel(cmd, nfc->reg_base + NFC_REG_CMD);
> + meson_nfc_cmd_idle(nfc, 5);

Why 5 and 2 below? They look like magic values. Is this totally
experimental?

> +
> /* use the max erase time as the maximum clock for waiting R/B */
> - cmd = NFC_CMD_RB | NFC_CMD_RB_INT
> - | nfc->param.chip_select | nfc->timing.tbers_max;

This is not documented in the commit log, is it?

> + cmd = NFC_CMD_RB | NFC_CMD_RB_INT | nfc->timing.tbers_max;
> writel(cmd, nfc->reg_base + NFC_REG_CMD);
> + meson_nfc_cmd_idle(nfc, 2);
>
> ret = wait_for_completion_timeout(&nfc->completion,
> msecs_to_jiffies(timeout_ms));
> if (ret == 0)
> - ret = -1;
> + return -1;

Please use real error codes, such as ETIMEDOUT.

>
> - return ret;
> + if (!cmd_read0)
> + return 0;
> +
> + cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_READ0;

This looks really wrong, I don't get why you would need to send an
expensive READ0 command.

> + writel(cmd, nfc->reg_base + NFC_REG_CMD);
> + meson_nfc_drain_cmd(nfc);
> + meson_nfc_wait_cmd_finish(nfc, CMD_FIFO_EMPTY_TIMEOUT);
> +
> + return 0;
> }
>
> static void meson_nfc_set_user_byte(struct nand_chip *nand, u8 *oob_buf)
> @@ -623,7 +635,7 @@ static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand,
> if (in) {
> nfc->cmdfifo.rw.cmd1 = cs | NFC_CMD_CLE | NAND_CMD_READSTART;
> writel(nfc->cmdfifo.rw.cmd1, nfc->reg_base + NFC_REG_CMD);
> - meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tR_max));
> + meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tR_max), 1);
> } else {
> meson_nfc_cmd_idle(nfc, nfc->timing.tadl);
> }
> @@ -669,7 +681,7 @@ static int meson_nfc_write_page_sub(struct nand_chip *nand,
>
> cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_PAGEPROG;
> writel(cmd, nfc->reg_base + NFC_REG_CMD);
> - meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tPROG_max));
> + meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tPROG_max), 0);
>
> meson_nfc_dma_buffer_release(nand, data_len, info_len, DMA_TO_DEVICE);
>
> @@ -952,7 +964,7 @@ static int meson_nfc_exec_op(struct nand_chip *nand,
> break;
>
> case NAND_OP_WAITRDY_INSTR:
> - meson_nfc_queue_rb(nfc, instr->ctx.waitrdy.timeout_ms);
> + meson_nfc_queue_rb(nfc, instr->ctx.waitrdy.timeout_ms, 1);
> if (instr->delay_ns)
> meson_nfc_cmd_idle(nfc, delay_idle);
> break;

Thanks,
Miquèl