Re: [PATCH v2 03/10] riscv: Make legacy counter enum match the HW numbering

Andrew Jones
2023-05-31T14:01:55Z

On Fri, May 12, 2023 at 10:53:14AM +0200, Alexandre Ghiti wrote:
> RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this
> hardware counter from CSR_CYCLE is actually 2: make this offset match the
> real hw offset so that we can directly expose those values to userspace.
>
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> ---
> drivers/perf/riscv_pmu_legacy.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index ca9e20bfc7ac..0d8c9d8849ee 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -12,8 +12,11 @@
> #include <linux/perf/riscv_pmu.h>
> #include <linux/platform_device.h>
>
> -#define RISCV_PMU_LEGACY_CYCLE 0
> -#define RISCV_PMU_LEGACY_INSTRET 1
> +enum {
> + RISCV_PMU_LEGACY_CYCLE,
> + RISCV_PMU_LEGACY_TIME,
> + RISCV_PMU_LEGACY_INSTRET
> +};

I guess this doesn't hurt, since these are just indices internal to this
driver, but it's a bit odd to also have a RISCV_PMU_LEGACY_TIME, when
the driver is only for cycle and instret, as its Kconfig help text says.

Thanks,
drew