From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 608B3C7EE25 for ; Thu, 8 Jun 2023 21:05:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ikflPzwOPa2qDqNqv0qjR6xjGZR2mT1PQjfIK/jEixk=; b=jB4ITdYEjcQd7j SYdkwlYbs3k7EcNHM1SBgdbD7QdrLAeg6+fXKVNItkI9FSAqo45G+lJzwNfk1VUt7vXwfQzpo4UMz GAjIv/slYdqHHTMIDshdd/yzHKmOL1bPsxAePl16XTDzDGVQEEEvTILqqn3ko55FtXECx0gGxILNX T5GMsiBM90GuENuZw5z1ZmtarUIcShf29/Cm1UGU0KM6+3Z63Y2wq9g5JnfDTYmfgQ+AG18OscMwp cK0AFL7yfJqUdUrVJXBLVL6cDe2yQnHhbf7nYBFUlsgoJedzdzsH7y9XJgG0MmQTcT2F1ykWLcti+ Ax6NZrWHwXbuTNK5a2pg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q7Moj-00Adxd-1q; Thu, 08 Jun 2023 21:05:13 +0000 Received: from mail-io1-f49.google.com ([209.85.166.49]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q7Mog-00Adwm-1c; Thu, 08 Jun 2023 21:05:12 +0000 Received: by mail-io1-f49.google.com with SMTP id ca18e2360f4ac-774867fd6f7so50622739f.1; Thu, 08 Jun 2023 14:05:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686258308; x=1688850308; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=659QQ5o0RJcYetO+FfSdtr0AtP1kq3MC1W2qbtyWfug=; b=CRtkTqskugh3ZVujCNkYJit23H6zP/URZso6EqL+nZbaGVguYT2jIfWx6AAeqOq+bD F9cTMbljas4D3fAC/VFcrxRBPV1Hk+nCpqVw6e9K131y1oNch/Ys8wTTDjH4w/ivYtLi nRlhTsF2sdI++epKsrOLPAoS1F4HU8VFRZ22sRNmUDrDW0MzuuHQhfXz3WV77O7eR1qX 1+XxAZTjRBoRDc2Qw+id9fZNaH4tw+adjhg1j/W46zU8Kfj4AMnb28j+5yey5S58VqKY R+Zxy+WllTDJU7IAC/jpIYA5Afg4G2uwKvJ9bsbqQEHZNivfmqqOyQSKMPNb89qZBm8D +Rug== X-Gm-Message-State: AC+VfDx/AKAVl8lvrYfj2oSXcNRFFJPoRezuEJ1KuBW5uq2qOEGzueY+ h9HkM8H9qQKzyQEiX27L7A== X-Google-Smtp-Source: ACHHUZ7rRmGXmnpRmT5NgdTtJuMZenCQfLq1nIBRu8sRJkOPpqT6J9aOIzMkcUolL5ZTRHcwv6gLkA== X-Received: by 2002:a6b:fb12:0:b0:77a:c741:b749 with SMTP id h18-20020a6bfb12000000b0077ac741b749mr3956832iog.1.1686258307710; Thu, 08 Jun 2023 14:05:07 -0700 (PDT) Received: from robh_at_kernel.org ([64.188.179.250]) by smtp.gmail.com with ESMTPSA id i14-20020a02ca4e000000b00411b2414eb5sm490387jal.94.2023.06.08.14.05.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jun 2023 14:05:06 -0700 (PDT) Received: (nullmailer pid 3445498 invoked by uid 1000); Thu, 08 Jun 2023 21:05:04 -0000 Date: Thu, 8 Jun 2023 15:05:04 -0600 From: Rob Herring To: Guillaume Ranquet Cc: Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Krzysztof Kozlowski , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , CK Hu , Jitao shi , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Krzysztof Kozlowski , AngeloGioacchino Del Regno , mac.shen@mediatek.com, stuart.lee@mediatek.com Subject: Re: [PATCH v4 1/8] dt-bindings: display: mediatek: add MT8195 hdmi bindings Message-ID: <20230608210504.GA3436215-robh@kernel.org> References: <20220919-v4-0-687f09a06dd9@baylibre.com> <20220919-v4-1-687f09a06dd9@baylibre.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220919-v4-1-687f09a06dd9@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230608_140510_567958_DE54A2E9 X-CRM114-Status: GOOD ( 20.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, May 29, 2023 at 04:30:58PM +0200, Guillaume Ranquet wrote: > Add mt8195 SoC bindings for hdmi and hdmi-ddc > > On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no > specific register range, power domain or interrupt, making it simpler > than the legacy "mediatek,hdmi-ddc" binding. > > Signed-off-by: Guillaume Ranquet > --- > .../bindings/display/mediatek/mediatek,hdmi.yaml | 59 ++++++++++++++++++---- > .../display/mediatek/mediatek,mt8195-hdmi-ddc.yaml | 45 +++++++++++++++++ > 2 files changed, 93 insertions(+), 11 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml > index b90b6d18a828..4f62e6b94048 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml > @@ -21,6 +21,7 @@ properties: > - mediatek,mt7623-hdmi > - mediatek,mt8167-hdmi > - mediatek,mt8173-hdmi > + - mediatek,mt8195-hdmi > > reg: > maxItems: 1 > @@ -29,18 +30,10 @@ properties: > maxItems: 1 > > clocks: > - items: > - - description: Pixel Clock > - - description: HDMI PLL > - - description: Bit Clock > - - description: S/PDIF Clock > + maxItems: 4 > > clock-names: > - items: > - - const: pixel > - - const: pll > - - const: bclk > - - const: spdif > + maxItems: 4 > > phys: > maxItems: 1 > @@ -58,6 +51,9 @@ properties: > description: | > phandle link and register offset to the system configuration registers. > > + power-domains: > + maxItems: 1 > + > ports: > $ref: /schemas/graph.yaml#/properties/ports > > @@ -86,9 +82,50 @@ required: > - clock-names > - phys > - phy-names > - - mediatek,syscon-hdmi > - ports > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt8195-hdmi > + then: > + properties: > + clocks: > + items: > + - description: APB > + - description: HDCP > + - description: HDCP 24M > + - description: Split HDMI > + clock-names: > + items: > + - const: hdmi_apb_sel > + - const: hdcp_sel > + - const: hdcp24_sel > + - const: split_hdmi > + > + required: > + - power-domains > + else: > + properties: > + clocks: > + items: > + - description: Pixel Clock > + - description: HDMI PLL > + - description: Bit Clock > + - description: S/PDIF Clock > + > + clock-names: > + items: > + - const: pixel > + - const: pll > + - const: bclk > + - const: spdif I don't understand how the same h/w block can have completely different clocks. If not the same h/w or evolution of the same h/w, then do a separate schema. > + > + required: > + - mediatek,syscon-hdmi > + > additionalProperties: false > > examples: > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml > new file mode 100644 > index 000000000000..84c096835b47 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek HDMI DDC for mt8195 > + > +maintainers: > + - CK Hu > + - Jitao shi > + > +description: | > + The HDMI DDC i2c controller is used to interface with the HDMI DDC pins. > + > +properties: > + compatible: > + enum: > + - mediatek,mt8195-hdmi-ddc > + > + clocks: > + maxItems: 1 > + > + mediatek,hdmi: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + A phandle to the mt8195 hdmi controller > + > +required: > + - compatible > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + hdmiddc0: i2c { > + compatible = "mediatek,mt8195-hdmi-ddc"; > + mediatek,hdmi = <&hdmi0>; > + clocks = <&clk26m>; How does one access this h/w device? There is nothing described to access it. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel