From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8FD34EB64D9 for ; Sun, 2 Jul 2023 09:21:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4pxX8XMz2ahlC7JsQAZDTNaFfA3nsNMCEc+GDaSF/9o=; b=jR9Jx5X8ZwOMai 8INX9GpQIn4ssTonqldovI5/0xbBTEHvh8rmNfRWoFlfTOZrgR/BUqxnz2CUYM/VeZZxtHJYx5+04 zfACG24yTgnfZcci7jPVxyF8g7ccKg6bj8JHnme4m/Lr1K3c0byRm8guPmj8RJmg+Yw96tbGj477E HWLyYDHEYYo+3zq64lyDSeXkMQYzYJjeki+w3R0I34cRAUNbIY90yVir1ASDylyFlSBx3H+8Fh7G1 fHCnQY8FjZgjtNOhqsyq/dY0K/h9KtMu+qU9bSiNY/+pIrLNILcE2DgxLBfVATExC9L9CoY2jxpJA JosLcH5V8y7Qti1bDIHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qFtGt-007TQG-0y; Sun, 02 Jul 2023 09:21:31 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qFtGq-007TOy-08; Sun, 02 Jul 2023 09:21:29 +0000 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.207]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4Qv3Pz27jmz6D9CM; Sun, 2 Jul 2023 17:18:31 +0800 (CST) Received: from localhost (10.48.51.211) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Sun, 2 Jul 2023 10:21:20 +0100 Date: Sun, 2 Jul 2023 17:21:16 +0800 From: Jonathan Cameron To: George Stark CC: , , , , , , , , , , , , Subject: Re: [PATCH v3 5/5] meson saradc: support reading from channel 7 mux inputs Message-ID: <20230702172116.00006f33@Huawei.com> In-Reply-To: <20230627224017.1724097-6-gnstark@sberdevices.ru> References: <20230627224017.1724097-1-gnstark@sberdevices.ru> <20230627224017.1724097-6-gnstark@sberdevices.ru> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.48.51.211] X-ClientProxiedBy: lhrpeml500004.china.huawei.com (7.191.163.9) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230702_022128_369611_A6AB6280 X-CRM114-Status: GOOD ( 14.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 28 Jun 2023 01:37:18 +0300 George Stark wrote: > Add iio channel for every channel 7 mux input. > Meson saradc channel 7 is connected to a mux that can switch channel > input to well-known sources like Vdd, GND and several Vdd dividers. > > Signed-off-by: George Stark > --- > drivers/iio/adc/meson_saradc.c | 83 ++++++++++++++++++++++++++++++++-- > 1 file changed, 79 insertions(+), 4 deletions(-) > > diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c > index 4a9dacedb6c3..c99a55944ece 100644 > --- a/drivers/iio/adc/meson_saradc.c > +++ b/drivers/iio/adc/meson_saradc.c > @@ -163,6 +163,7 @@ > #define MESON_SAR_ADC_MAX_FIFO_SIZE 32 > #define MESON_SAR_ADC_TIMEOUT 100 /* ms */ > #define MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL 6 > +#define MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL 7 > #define MESON_SAR_ADC_TEMP_OFFSET 27 > > /* temperature sensor calibration information in eFuse */ > @@ -202,6 +203,19 @@ > .datasheet_name = "TEMP_SENSOR", \ > } > > +#define MESON_SAR_ADC_MUX(_chan, _sel) { \ > + .type = IIO_VOLTAGE, \ > + .channel = _chan, \ > + .indexed = 1, \ > + .address = MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL, \ > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ > + BIT(IIO_CHAN_INFO_AVERAGE_RAW), \ > + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ > + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_CALIBBIAS) | \ > + BIT(IIO_CHAN_INFO_CALIBSCALE), \ > + .datasheet_name = "SAR_ADC_MUX_"#_sel, \ > +} > + > enum meson_sar_adc_avg_mode { > NO_AVERAGING = 0x0, > MEAN_AVERAGING = 0x1, > @@ -235,6 +249,27 @@ enum meson_sar_adc_channel_index { > NUM_CHAN_7, > NUM_CHAN_TEMP, > NUM_CHAN_SOFT_TIMESTAMP, Silly question... Why does this device have timestamp channels? It has no buffer support so they don't 'do anything'. If it had then putting other channels after that might have broken things if not done very carefully (hence I went looking) > + NUM_MUX_0_VSS, > + NUM_MUX_1_VDD_DIV4, > + NUM_MUX_2_VDD_DIV2, > + NUM_MUX_3_VDD_MUL3_DIV4, > + NUM_MUX_4_VDD, > +}; ... > static const struct iio_chan_spec meson_sar_adc_iio_channels[] = { > @@ -247,6 +282,11 @@ static const struct iio_chan_spec meson_sar_adc_iio_channels[] = { > MESON_SAR_ADC_CHAN(NUM_CHAN_6), > MESON_SAR_ADC_CHAN(NUM_CHAN_7), > IIO_CHAN_SOFT_TIMESTAMP(NUM_CHAN_SOFT_TIMESTAMP), > + MESON_SAR_ADC_MUX(NUM_MUX_0_VSS, 0), > + MESON_SAR_ADC_MUX(NUM_MUX_1_VDD_DIV4, 1), > + MESON_SAR_ADC_MUX(NUM_MUX_2_VDD_DIV2, 2), > + MESON_SAR_ADC_MUX(NUM_MUX_3_VDD_MUL3_DIV4, 3), > + MESON_SAR_ADC_MUX(NUM_MUX_4_VDD, 4), > }; Jonathan _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel