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From: Andrew Jones <ajones@ventanamicro.com>
To: joey.gouly@arm.com
Cc: linux-arm-kernel@lists.infradead.org, nd@arm.com,
	broonie@kernel.org, catalin.marinas@arm.com, james.morse@arm.com,
	mark.rutland@arm.com, maz@kernel.org, oliver.upton@linux.dev,
	shuah@kernel.org, suzuki.poulose@arm.com, will@kernel.org,
	yuzenghui@huawei.com
Subject: Re: [PATCH v4 20/20] KVM: selftests: get-reg-list: add Permission Indirection registers
Date: Mon,  3 Jul 2023 14:03:45 +0200	[thread overview]
Message-ID: <20230703120344.14247-2-ajones@ventanamicro.com> (raw)
In-Reply-To: <20230606145859.697944-21-joey.gouly@arm.com>

> Add new system registers:
>   - ID_AA64MMFR3_EL1
>   - TCR2_EL1
>   - PIRE0_EL1
>   - PIR_EL1
> 
> Signed-off-by: Joey Gouly <joey.gouly@arm.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Oliver Upton <oliver.upton@linux.dev>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Shuah Khan <shuah@kernel.org>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> ---
>  .../selftests/kvm/aarch64/get-reg-list.c      | 21 +++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
> index 3ab236ceb6fc..4f10055af2aa 100644
> --- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
> @@ -56,6 +56,24 @@ struct feature_id_reg {
>  };
>  
>  static struct feature_id_reg feat_id_regs[] = {
> +	{
> +		ARM64_SYS_REG(3, 0, 2, 0, 3),	/* TCR2_EL1 */
> +		ARM64_SYS_REG(3, 0, 0, 7, 3),	/* ID_AA64MMFR3_EL1 */
> +		0,
> +		1
> +	},
> +	{
> +		ARM64_SYS_REG(3, 0, 10, 2, 2),	/* PIRE0_EL1 */
> +		ARM64_SYS_REG(3, 0, 0, 7, 3),	/* ID_AA64MMFR3_EL1 */
> +		4,
> +		1
> +	},
> +	{
> +		ARM64_SYS_REG(3, 0, 10, 2, 3),	/* PIR_EL1 */
> +		ARM64_SYS_REG(3, 0, 0, 7, 3),	/* ID_AA64MMFR3_EL1 */
> +		4,
> +		1
> +	}
>  };
>  
>  struct vcpu_config {
> @@ -873,12 +891,15 @@ static __u64 base_regs[] = {
>  	ARM64_SYS_REG(3, 0, 2, 0, 0),	/* TTBR0_EL1 */
>  	ARM64_SYS_REG(3, 0, 2, 0, 1),	/* TTBR1_EL1 */
>  	ARM64_SYS_REG(3, 0, 2, 0, 2),	/* TCR_EL1 */
> +	ARM64_SYS_REG(3, 0, 2, 0, 3),	/* TCR2_EL1 */
>  	ARM64_SYS_REG(3, 0, 5, 1, 0),	/* AFSR0_EL1 */
>  	ARM64_SYS_REG(3, 0, 5, 1, 1),	/* AFSR1_EL1 */
>  	ARM64_SYS_REG(3, 0, 5, 2, 0),	/* ESR_EL1 */
>  	ARM64_SYS_REG(3, 0, 6, 0, 0),	/* FAR_EL1 */
>  	ARM64_SYS_REG(3, 0, 7, 4, 0),	/* PAR_EL1 */
>  	ARM64_SYS_REG(3, 0, 10, 2, 0),	/* MAIR_EL1 */
> +	ARM64_SYS_REG(3, 0, 10, 2, 2),	/* PIRE0_EL1 */
> +	ARM64_SYS_REG(3, 0, 10, 2, 3),	/* PIR_EL1 */

Hi Joey,

Any reason these registers needed to be added to the base reg set? Usually
new registers get added to their own sublist, which then get tested by
their own subtest. That way the subtest can SKIP when the new registers
aren't present. That approach should avoid the need for modifying
for_each_missing_reg() (well, after changing the call of check_supported()
to be after configuring the vcpu, in order to pass the vcpu to it, and
after extending check_supported() to call check_supported_feat_reg()).

Thanks,
drew

>  	ARM64_SYS_REG(3, 0, 10, 3, 0),	/* AMAIR_EL1 */
>  	ARM64_SYS_REG(3, 0, 12, 0, 0),	/* VBAR_EL1 */
>  	ARM64_SYS_REG(3, 0, 12, 1, 1),	/* DISR_EL1 */
> -- 
> 2.25.1
> 

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  reply	other threads:[~2023-07-03 12:04 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-06 14:58 [PATCH v4 00/20] Permission Indirection Extension Joey Gouly
2023-06-06 14:58 ` [PATCH v4 01/20] arm64/sysreg: Add ID register ID_AA64MMFR3 Joey Gouly
2023-06-06 14:58 ` [PATCH v4 02/20] arm64/sysreg: add system registers TCR2_ELx Joey Gouly
2023-06-06 14:58 ` [PATCH v4 03/20] arm64/sysreg: update HCRX_EL2 register Joey Gouly
2023-06-06 14:58 ` [PATCH v4 04/20] arm64/sysreg: add PIR*_ELx registers Joey Gouly
2023-06-06 14:58 ` [PATCH v4 05/20] arm64: cpufeature: add system register ID_AA64MMFR3 Joey Gouly
2023-06-06 14:58 ` [PATCH v4 06/20] arm64: cpufeature: add TCR2 cpucap Joey Gouly
2023-06-06 14:58 ` [PATCH v4 07/20] arm64: cpufeature: add Permission Indirection Extension cpucap Joey Gouly
2023-06-06 14:58 ` [PATCH v4 08/20] KVM: arm64: Save/restore TCR2_EL1 Joey Gouly
2023-06-06 14:58 ` [PATCH v4 09/20] KVM: arm64: Save/restore PIE registers Joey Gouly
2023-06-06 14:58 ` [PATCH v4 10/20] KVM: arm64: expose ID_AA64MMFR3_EL1 to guests Joey Gouly
2023-06-06 14:58 ` [PATCH v4 11/20] arm64: add PTE_UXN/PTE_WRITE to SWAPPER_*_FLAGS Joey Gouly
2023-06-06 14:58 ` [PATCH v4 12/20] arm64: add PTE_WRITE to PROT_SECT_NORMAL Joey Gouly
2023-06-06 14:58 ` [PATCH v4 13/20] arm64: reorganise PAGE_/PROT_ macros Joey Gouly
2023-08-22 14:10   ` Ard Biesheuvel
2023-08-24 10:14     ` Joey Gouly
2023-08-24 10:18       ` Ard Biesheuvel
2023-08-24 13:09         ` Joey Gouly
2023-08-28 10:30           ` Ard Biesheuvel
2023-06-06 14:58 ` [PATCH v4 14/20] arm64: disable EL2 traps for PIE Joey Gouly
2023-06-06 14:58 ` [PATCH v4 15/20] arm64: add encodings of PIRx_ELx registers Joey Gouly
2023-06-06 14:58 ` [PATCH v4 16/20] arm64: enable Permission Indirection Extension (PIE) Joey Gouly
2023-06-20 19:16   ` Neil Armstrong
2023-06-20 19:47     ` Joey Gouly
2023-06-20 20:27     ` Mark Brown
2023-06-20 20:41       ` Oliver Upton
2023-06-20 20:35     ` Marc Zyngier
2023-06-20 21:17       ` Trilok Soni
2023-06-06 14:58 ` [PATCH v4 17/20] arm64: transfer permission indirection settings to EL2 Joey Gouly
2023-06-06 14:58 ` [PATCH v4 18/20] arm64: Document boot requirements for PIE Joey Gouly
2023-06-06 14:58 ` [PATCH v4 19/20] KVM: selftests: get-reg-list: support ID register features Joey Gouly
2023-06-06 14:58 ` [PATCH v4 20/20] KVM: selftests: get-reg-list: add Permission Indirection registers Joey Gouly
2023-07-03 12:03   ` Andrew Jones [this message]
2023-07-12 14:59     ` Joey Gouly
2023-07-19 15:11       ` Andrew Jones
2023-06-06 17:29 ` [PATCH v4 00/20] Permission Indirection Extension Catalin Marinas

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