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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Eric Auger <eric.auger@redhat.com>,
	Mark Brown <broonie@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Chase Conklin <chase.conklin@arm.com>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	Darren Hart <darren@os.amperecomputing.com>,
	Miguel Luis <miguel.luis@oracle.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH 24/27] KVM: arm64: nv: Add switching support for HFGxTR/HDFGxTR
Date: Wed, 12 Jul 2023 15:58:07 +0100	[thread overview]
Message-ID: <20230712145810.3864793-25-maz@kernel.org> (raw)
In-Reply-To: <20230712145810.3864793-1-maz@kernel.org>

Now that we can evaluate the FGT registers, allow them to be merged
with the hypervisor's own configuration (in the case of HFG{RW}TR_EL2)
or simply set for HFGITR_EL2, HDGFRTR_EL2 and HDFGWTR_EL2.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/hyp/include/hyp/switch.h | 48 +++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index 9781e79a5127..5fa1ae26f075 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -70,6 +70,13 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)
 	}
 }
 
+#define compute_clr_set(vcpu, reg, clr, set)				\
+	do {								\
+		u64 hfg;						\
+		hfg = __vcpu_sys_reg(vcpu, reg) & ~__ ## reg ## _RES0;	\
+		set |= hfg & __ ## reg ## _MASK; 			\
+		clr |= ~hfg & __ ## reg ## _nMASK; 			\
+	} while(0)
 
 
 static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)
@@ -97,6 +104,10 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)
 	if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))
 		w_set |= HFGxTR_EL2_TCR_EL1_MASK;
 
+	if (vcpu_has_nv(vcpu) && !is_hyp_ctxt(vcpu)) {
+		compute_clr_set(vcpu, HFGRTR_EL2, r_clr, r_set);
+		compute_clr_set(vcpu, HFGWTR_EL2, w_clr, w_set);
+	}
 
 	r_val = __HFGRTR_EL2_nMASK & ~HFGxTR_EL2_nACCDATA_EL1;
 	r_val |= r_set;
@@ -108,6 +119,38 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)
 
 	write_sysreg_s(r_val, SYS_HFGRTR_EL2);
 	write_sysreg_s(w_val, SYS_HFGWTR_EL2);
+
+	if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))
+		return;
+
+	ctxt_sys_reg(hctxt, HFGITR_EL2) = read_sysreg_s(SYS_HFGITR_EL2);
+
+	r_set = r_clr = 0;
+	compute_clr_set(vcpu, HFGITR_EL2, r_clr, r_set);
+	r_val = __HFGITR_EL2_nMASK;
+	r_val |= r_set;
+	r_val &= ~r_clr;
+
+	write_sysreg_s(r_val, SYS_HFGITR_EL2);
+
+	ctxt_sys_reg(hctxt, HDFGRTR_EL2) = read_sysreg_s(SYS_HDFGRTR_EL2);
+	ctxt_sys_reg(hctxt, HDFGWTR_EL2) = read_sysreg_s(SYS_HDFGWTR_EL2);
+
+	r_clr = r_set = w_clr = w_set = 0;
+
+	compute_clr_set(vcpu, HDFGRTR_EL2, r_clr, r_set);
+	compute_clr_set(vcpu, HDFGWTR_EL2, w_clr, w_set);
+
+	r_val = __HDFGRTR_EL2_nMASK;
+	r_val |= r_set;
+	r_val &= ~r_clr;
+
+	w_val = __HDFGWTR_EL2_nMASK;
+	w_val |= w_set;
+	w_val &= ~w_clr;
+
+	write_sysreg_s(r_val, SYS_HDFGRTR_EL2);
+	write_sysreg_s(w_val, SYS_HDFGWTR_EL2);
 }
 
 static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu)
@@ -120,7 +163,12 @@ static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu)
 	write_sysreg_s(ctxt_sys_reg(hctxt, HFGRTR_EL2), SYS_HFGRTR_EL2);
 	write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2);
 
+	if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))
+		return;
 
+	write_sysreg_s(ctxt_sys_reg(hctxt, HFGITR_EL2), SYS_HFGITR_EL2);
+	write_sysreg_s(ctxt_sys_reg(hctxt, HDFGRTR_EL2), SYS_HDFGRTR_EL2);
+	write_sysreg_s(ctxt_sys_reg(hctxt, HDFGWTR_EL2), SYS_HDFGWTR_EL2);
 }
 
 static inline void __activate_traps_common(struct kvm_vcpu *vcpu)
-- 
2.34.1


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  parent reply	other threads:[~2023-07-12 15:17 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-12 14:57 [PATCH 00/27] KVM: arm64: NV trap forwarding infrastructure Marc Zyngier
2023-07-12 14:57 ` [PATCH 01/27] arm64: Add missing VA CMO encodings Marc Zyngier
2023-07-12 14:57 ` [PATCH 02/27] arm64: Add missing ERX*_EL1 encodings Marc Zyngier
2023-07-12 14:57 ` [PATCH 03/27] arm64: Add missing DC ZVA/GVA/GZVA encodings Marc Zyngier
2023-07-12 14:57 ` [PATCH 04/27] arm64: Add TLBI operation encodings Marc Zyngier
2023-07-12 14:57 ` [PATCH 05/27] arm64: Add AT " Marc Zyngier
2023-07-12 14:57 ` [PATCH 06/27] arm64: Add debug registers affected by HDFGxTR_EL2 Marc Zyngier
2023-07-14 14:47   ` Eric Auger
2023-07-14 16:09     ` Marc Zyngier
2023-07-19  8:48   ` Suzuki K Poulose
2023-07-19 11:00   ` Suzuki K Poulose
2023-07-27 15:42     ` Marc Zyngier
2023-07-12 14:57 ` [PATCH 07/27] arm64: Add missing BRB/CFP/DVP/CPP instructions Marc Zyngier
2023-07-18 17:30   ` Miguel Luis
2023-07-12 14:57 ` [PATCH 08/27] arm64: Fix HFGxTR_EL2 field naming Marc Zyngier
2023-07-12 14:57 ` [PATCH 09/27] arm64: Add HDFGRTR_EL2 and HDFGWTR_EL2 layouts Marc Zyngier
2023-07-12 16:59   ` Mark Brown
2023-07-12 14:57 ` [PATCH 10/27] arm64: Add feature detection for fine grained traps Marc Zyngier
2023-07-14  9:57   ` Eric Auger
2023-07-12 14:57 ` [PATCH 11/27] KVM: arm64: Correctly handle ACCDATA_EL1 traps Marc Zyngier
2023-07-12 14:57 ` [PATCH 12/27] KVM: arm64: Add missing HCR_EL2 trap bits Marc Zyngier
2023-07-12 14:57 ` [PATCH 13/27] KVM: arm64: nv: Add FGT registers Marc Zyngier
2023-07-12 14:57 ` [PATCH 14/27] KVM: arm64: Restructure FGT register switching Marc Zyngier
2023-07-12 17:15   ` Mark Brown
2023-07-12 20:06     ` Marc Zyngier
2023-07-12 21:15       ` Mark Brown
     [not found]   ` <fd0d93ae-1ae5-b53e-ccb7-04d78f7c31d9@redhat.com>
     [not found]     ` <87y1j3qgpu.wl-maz@kernel.org>
2023-07-28 17:22       ` Eric Auger
2023-07-12 14:57 ` [PATCH 15/27] KVM: arm64: nv: Add trap forwarding infrastructure Marc Zyngier
2023-07-12 14:57 ` [PATCH 16/27] KVM: arm64: nv: Add trap forwarding for HCR_EL2 Marc Zyngier
2023-07-13 14:05   ` Eric Auger
2023-07-13 15:53     ` Marc Zyngier
2023-07-14 10:10       ` Marc Zyngier
2023-07-14 15:06         ` Eric Auger
2023-07-14 16:28           ` Marc Zyngier
2023-07-14 14:58       ` Eric Auger
2023-07-12 14:58 ` [PATCH 17/27] KVM: arm64: nv: Expose FEAT_EVT to nested guests Marc Zyngier
2023-07-12 14:58 ` [PATCH 18/27] KVM: arm64: nv: Add trap forwarding for MDCR_EL2 Marc Zyngier
2023-07-13 17:34   ` Eric Auger
2023-07-14 11:13     ` Marc Zyngier
2023-07-12 14:58 ` [PATCH 19/27] KVM: arm64: nv: Add trap forwarding for CNTHCTL_EL2 Marc Zyngier
     [not found]   ` <9739cab9-c058-ec5f-ac15-7d708aef4e85@redhat.com>
2023-07-27 15:38     ` Marc Zyngier
2023-07-12 14:58 ` [PATCH 20/27] KVM: arm64: nv: Add trap forwarding for HFGxTR_EL2 Marc Zyngier
2023-07-12 14:58 ` [PATCH 21/27] KVM: arm64: nv: Add trap forwarding for HFGITR_EL2 Marc Zyngier
2023-07-12 14:58 ` [PATCH 22/27] KVM: arm64: nv: Add trap forwarding for HDFGxTR_EL2 Marc Zyngier
2023-07-12 14:58 ` [PATCH 23/27] KVM: arm64: nv: Add SVC trap forwarding Marc Zyngier
2023-07-12 14:58 ` Marc Zyngier [this message]
2023-07-12 14:58 ` [PATCH 25/27] KVM: arm64: nv: Expose FGT to nested guests Marc Zyngier
2023-07-12 14:58 ` [PATCH 26/27] KVM: arm64: Move HCRX_EL2 switch to load/put on VHE systems Marc Zyngier
2023-07-12 14:58 ` [PATCH 27/27] KVM: arm64: nv: Add support for HCRX_EL2 Marc Zyngier
2023-07-12 15:16 ` [PATCH 00/27] KVM: arm64: NV trap forwarding infrastructure Eric Auger
2023-07-12 15:29   ` Eric Auger
2023-07-12 15:31   ` Marc Zyngier

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