From: Jing Zhang <jingzhangos@google.com>
To: KVM <kvm@vger.kernel.org>, KVMARM <kvmarm@lists.linux.dev>,
ARMLinux <linux-arm-kernel@lists.infradead.org>,
Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>
Cc: Will Deacon <will@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Fuad Tabba <tabba@google.com>, Reiji Watanabe <reijiw@google.com>,
Raghavendra Rao Ananta <rananta@google.com>,
Suraj Jitindar Singh <surajjs@amazon.com>,
Cornelia Huck <cohuck@redhat.com>,
Jing Zhang <jingzhangos@google.com>
Subject: [PATCH v6 5/5] KVM: arm64: selftests: Test for setting ID register from usersapce
Date: Mon, 17 Jul 2023 15:27:22 +0000 [thread overview]
Message-ID: <20230717152722.1837864-6-jingzhangos@google.com> (raw)
In-Reply-To: <20230717152722.1837864-1-jingzhangos@google.com>
Add a test to verify setting ID registers from userapce is handled
correctly by KVM.
Signed-off-by: Jing Zhang <jingzhangos@google.com>
---
tools/testing/selftests/kvm/Makefile | 1 +
.../selftests/kvm/aarch64/set_id_regs.c | 163 ++++++++++++++++++
2 files changed, 164 insertions(+)
create mode 100644 tools/testing/selftests/kvm/aarch64/set_id_regs.c
diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
index c692cc86e7da..87ceadc1292a 100644
--- a/tools/testing/selftests/kvm/Makefile
+++ b/tools/testing/selftests/kvm/Makefile
@@ -144,6 +144,7 @@ TEST_GEN_PROGS_aarch64 += aarch64/get-reg-list
TEST_GEN_PROGS_aarch64 += aarch64/hypercalls
TEST_GEN_PROGS_aarch64 += aarch64/page_fault_test
TEST_GEN_PROGS_aarch64 += aarch64/psci_test
+TEST_GEN_PROGS_aarch64 += aarch64/set_id_regs
TEST_GEN_PROGS_aarch64 += aarch64/smccc_filter
TEST_GEN_PROGS_aarch64 += aarch64/vcpu_width_config
TEST_GEN_PROGS_aarch64 += aarch64/vgic_init
diff --git a/tools/testing/selftests/kvm/aarch64/set_id_regs.c b/tools/testing/selftests/kvm/aarch64/set_id_regs.c
new file mode 100644
index 000000000000..e2242ef36bab
--- /dev/null
+++ b/tools/testing/selftests/kvm/aarch64/set_id_regs.c
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * set_id_regs - Test for setting ID register from usersapce.
+ *
+ * Copyright (c) 2023 Google LLC.
+ *
+ *
+ * Test that KVM supports setting ID registers from userspace and handles the
+ * feature set correctly.
+ */
+
+#include <stdint.h>
+#include "kvm_util.h"
+#include "processor.h"
+#include "test_util.h"
+#include <linux/bitfield.h>
+
+#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
+#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
+
+struct reg_feature {
+ uint64_t reg;
+ uint64_t ftr_mask;
+};
+
+static void guest_code(void)
+{
+ for (;;)
+ GUEST_SYNC(0);
+}
+
+static struct reg_feature lower_safe_reg_ftrs[] = {
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), ARM64_FEATURE_MASK(ID_AA64DFR0_BRPS) },
+ { KVM_ARM64_SYS_REG(SYS_ID_DFR0_EL1), ARM64_FEATURE_MASK(ID_DFR0_COPDBG) },
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1), ARM64_FEATURE_MASK(ID_AA64PFR0_EL3) },
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64MMFR0_EL1), ARM64_FEATURE_MASK(ID_AA64MMFR0_TGRAN4) },
+};
+
+static void test_user_set_lower_safe(struct kvm_vcpu *vcpu)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(lower_safe_reg_ftrs); i++) {
+ struct reg_feature *reg_ftr = lower_safe_reg_ftrs + i;
+ uint64_t val, new_val, ftr;
+
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ftr = field_get(reg_ftr->ftr_mask, val);
+
+ /* Set a safe value for the feature */
+ if (ftr > 0)
+ ftr--;
+
+ val &= ~reg_ftr->ftr_mask;
+ val |= field_prep(reg_ftr->ftr_mask, ftr);
+
+ vcpu_set_reg(vcpu, reg_ftr->reg, val);
+ vcpu_get_reg(vcpu, reg_ftr->reg, &new_val);
+ ASSERT_EQ(new_val, val);
+ }
+}
+
+static struct reg_feature exact_reg_ftrs[] = {
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER) },
+};
+
+static void test_user_set_exact(struct kvm_vcpu *vcpu)
+{
+ int i, r;
+
+ for (i = 0; i < ARRAY_SIZE(exact_reg_ftrs); i++) {
+ struct reg_feature *reg_ftr = exact_reg_ftrs + i;
+ uint64_t val, old_val, ftr;
+
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ftr = field_get(reg_ftr->ftr_mask, val);
+ old_val = val;
+
+ /* Exact match */
+ vcpu_set_reg(vcpu, reg_ftr->reg, val);
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ASSERT_EQ(val, old_val);
+
+ /* Smaller value */
+ if (ftr > 0)
+ ftr--;
+ val &= ~reg_ftr->ftr_mask;
+ val |= field_prep(reg_ftr->ftr_mask, ftr);
+ r = __vcpu_set_reg(vcpu, reg_ftr->reg, val);
+ TEST_ASSERT(r < 0 && errno == EINVAL,
+ "Unexpected KVM_SET_ONE_REG error: r=%d, errno=%d", r, errno);
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ASSERT_EQ(val, old_val);
+
+ /* Bigger value */
+ ftr += 2;
+ val &= ~reg_ftr->ftr_mask;
+ val |= field_prep(reg_ftr->ftr_mask, ftr);
+ r = __vcpu_set_reg(vcpu, reg_ftr->reg, val);
+ TEST_ASSERT(r < 0 && errno == EINVAL,
+ "Unexpected KVM_SET_ONE_REG error: r=%d, errno=%d", r, errno);
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ASSERT_EQ(val, old_val);
+ }
+}
+
+static struct reg_feature fail_reg_ftrs[] = {
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), ARM64_FEATURE_MASK(ID_AA64DFR0_WRPS) },
+ { KVM_ARM64_SYS_REG(SYS_ID_DFR0_EL1), ARM64_FEATURE_MASK(ID_DFR0_MPROFDBG) },
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1), ARM64_FEATURE_MASK(ID_AA64PFR0_EL2) },
+ { KVM_ARM64_SYS_REG(SYS_ID_AA64MMFR0_EL1), ARM64_FEATURE_MASK(ID_AA64MMFR0_TGRAN64) },
+};
+
+static void test_user_set_fail(struct kvm_vcpu *vcpu)
+{
+ int i, r;
+
+ for (i = 0; i < ARRAY_SIZE(fail_reg_ftrs); i++) {
+ struct reg_feature *reg_ftr = fail_reg_ftrs + i;
+ uint64_t val, old_val, ftr;
+
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ftr = field_get(reg_ftr->ftr_mask, val);
+
+ /* Set a invalid value (too big) for the feature */
+ ftr++;
+
+ old_val = val;
+ val &= ~reg_ftr->ftr_mask;
+ val |= field_prep(reg_ftr->ftr_mask, ftr);
+
+ r = __vcpu_set_reg(vcpu, reg_ftr->reg, val);
+ TEST_ASSERT(r < 0 && errno == EINVAL,
+ "Unexpected KVM_SET_ONE_REG error: r=%d, errno=%d", r, errno);
+
+ vcpu_get_reg(vcpu, reg_ftr->reg, &val);
+ ASSERT_EQ(val, old_val);
+ }
+}
+
+int main(void)
+{
+ struct kvm_vcpu *vcpu;
+ struct kvm_vm *vm;
+
+ vm = vm_create_with_one_vcpu(&vcpu, guest_code);
+
+ ksft_print_header();
+ ksft_set_plan(3);
+
+ test_user_set_lower_safe(vcpu);
+ ksft_test_result_pass("test_user_set_lower_safe\n");
+
+ test_user_set_exact(vcpu);
+ ksft_test_result_pass("test_user_set_exact\n");
+
+ test_user_set_fail(vcpu);
+ ksft_test_result_pass("test_user_set_fail\n");
+
+ kvm_vm_free(vm);
+
+ ksft_finished();
+}
--
2.41.0.255.g8b1d071c50-goog
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next prev parent reply other threads:[~2023-07-17 15:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 15:27 [PATCH v6 0/6] Enable writable for idregs DFR0,PFR0, MMFR{0,1,2, 3} Jing Zhang
2023-07-17 15:27 ` [PATCH v6 1/5] KVM: arm64: Use guest ID register values for the sake of emulation Jing Zhang
2023-07-17 15:27 ` [PATCH v6 2/5] KVM: arm64: Reject attempts to set invalid debug arch version Jing Zhang
2023-07-17 15:27 ` [PATCH v6 3/5] KVM: arm64: Enable writable for ID_AA64PFR0_EL1 Jing Zhang
2023-07-17 15:27 ` [PATCH v6 4/5] KVM: arm64: Enable writable for ID_AA64MMFR{0, 1, 2, 3}_EL1 Jing Zhang
2023-07-17 15:27 ` Jing Zhang [this message]
2023-07-18 16:27 ` [PATCH v6 0/6] Enable writable for idregs DFR0,PFR0, MMFR{0,1,2, 3} Jing Zhang
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