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From: Chen-Yu Tsai <wenst@chromium.org>
To: Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Mark Brown <broonie@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: Chen-Yu Tsai <wenst@chromium.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH RESEND v2 1/7] mfd: mt6358: Add missing registers for LDO voltage calibration
Date: Fri, 21 Jul 2023 16:28:53 +0800	[thread overview]
Message-ID: <20230721082903.2038975-2-wenst@chromium.org> (raw)
In-Reply-To: <20230721082903.2038975-1-wenst@chromium.org>

Most of the LDOs, except the "VSRAM_*" ones, on the MT6358 and MT6366
PMICs support a finer output voltage calibration within the range of
+0 mV to +100 mV with 10 mV step. Some of the registers for this
function are missing from the register table.

Add the missing ones for MT6358.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
---
 include/linux/mfd/mt6358/registers.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/linux/mfd/mt6358/registers.h b/include/linux/mfd/mt6358/registers.h
index 3d33517f178c..5ea2590be710 100644
--- a/include/linux/mfd/mt6358/registers.h
+++ b/include/linux/mfd/mt6358/registers.h
@@ -262,6 +262,12 @@
 #define MT6358_LDO_VBIF28_CON3                0x1db0
 #define MT6358_VCAMA1_ANA_CON0                0x1e08
 #define MT6358_VCAMA2_ANA_CON0                0x1e0c
+#define MT6358_VFE28_ANA_CON0                 0x1e10
+#define MT6358_VCN28_ANA_CON0                 0x1e14
+#define MT6358_VBIF28_ANA_CON0                0x1e18
+#define MT6358_VAUD28_ANA_CON0                0x1e1c
+#define MT6358_VAUX18_ANA_CON0                0x1e20
+#define MT6358_VXO22_ANA_CON0                 0x1e24
 #define MT6358_VCN33_ANA_CON0                 0x1e28
 #define MT6358_VSIM1_ANA_CON0                 0x1e2c
 #define MT6358_VSIM2_ANA_CON0                 0x1e30
-- 
2.41.0.487.g6d72f3e995-goog


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  reply	other threads:[~2023-07-21  8:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21  8:28 [PATCH RESEND v2 0/7] regulator: mt6358: Remove bogus regulators and improvements Chen-Yu Tsai
2023-07-21  8:28 ` Chen-Yu Tsai [this message]
2023-07-21  8:53   ` [PATCH RESEND v2 1/7] mfd: mt6358: Add missing registers for LDO voltage calibration AngeloGioacchino Del Regno
2023-07-21  8:28 ` [PATCH RESEND v2 2/7] regulator: mt6358: Sync VCN33_* enable status after checking ID Chen-Yu Tsai
2023-07-21  8:53   ` AngeloGioacchino Del Regno
2023-07-21  8:28 ` [PATCH RESEND v2 3/7] regulator: mt6358: Fix incorrect VCN33 sync error message Chen-Yu Tsai
2023-07-21  8:53   ` AngeloGioacchino Del Regno
2023-07-21  8:28 ` [PATCH RESEND v2 4/7] regulator: mt6358: Fail probe on unknown chip ID Chen-Yu Tsai
2023-07-21  8:53   ` AngeloGioacchino Del Regno
2023-07-21  8:28 ` [PATCH RESEND v2 5/7] regulator: mt6358: Add output voltage fine tuning to fixed regulators Chen-Yu Tsai
2023-07-21  8:28 ` [PATCH RESEND v2 6/7] regulator: mt6358: Add output voltage fine tuning to variable LDOs Chen-Yu Tsai
2023-07-21  8:28 ` [PATCH RESEND v2 7/7] arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulators Chen-Yu Tsai
2023-07-21  8:53   ` AngeloGioacchino Del Regno

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