From: Shawn Guo <shawnguo@kernel.org>
To: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org, marex@denx.de,
aford173@gmail.com, tharvey@gateworks.com, linux-imx@nxp.com,
kernel@pengutronix.de, Fabio Estevam <festevam@denx.de>
Subject: Re: [PATCH] arm64: dts: imx8mm: Drop CSI1 PHY reference clock configuration
Date: Sun, 30 Jul 2023 21:33:10 +0800 [thread overview]
Message-ID: <20230730133310.GU151430@dragon> (raw)
In-Reply-To: <20230725232628.3511073-1-festevam@gmail.com>
On Tue, Jul 25, 2023 at 08:26:28PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
>
> The CSI1 PHY reference clock is limited to 125 MHz according to:
> i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020
> Table 5-1. Clock Root Table (continued) / page 307
> Slice Index n = 123 .
>
> Currently the IMX8MM_CLK_CSI1_PHY_REF clock is configured to be
> fed directly from 1 GHz PLL2 , which overclocks them. Instead, drop
> the configuration altogether, which defaults the clock to 24 MHz REF
> clock input, which for the PHY reference clock is just fine.
>
> Based on a patch from Marek Vasut for the imx8mn.
>
> Fixes: e523b7c54c05 ("arm64: dts: imx8mm: Add CSI nodes")
> Signed-off-by: Fabio Estevam <festevam@denx.de>
Applied, thanks!
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parent reply other threads:[~2023-07-30 13:33 UTC|newest]
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[parent not found: <20230725232628.3511073-1-festevam@gmail.com>]
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