From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6274AEB64DD for ; Tue, 1 Aug 2023 09:57:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IcEAOUB1vF2gUP/LpDIJ0n9cjplptE4qnXLCAOH0G3o=; b=HaP0cUjN6pBy83 rPKGUtGiPM/BMrd8RuN0WW6IgDOakeAttAf7wzKK6yNjW/nO/7DCd1Ume1a5eYr6jrEv3ITVGoQBH rCsXMgHv61KQLKgZEuCmzwP2QOk1eVSiOBpzd6vhw4zDnJOKO0nv0R+DoeErhXyJJ9clNBRPnzDLm sIcSgbrZU8KREQIMnXz+3vhdjaNd1NKcTLmbXPY1ML06OzgVtYH9fN0kU2mONnrNDKdHx9B0l4wc6 lq48NEQfr/VjuaWQoYrkUYbFWX8JhQv09ESnX6XKP6qtQhGmurOoZGHVhU/TUniSeLZxjAnzZZkuF s8Hyig9+0FwEo4ZYmhig==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qQm7z-001hZn-0S; Tue, 01 Aug 2023 09:57:19 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qQm7y-001hZ5-1d for linux-arm-kernel@bombadil.infradead.org; Tue, 01 Aug 2023 09:57:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=bYCPTVIltoncEoED5uweOw5rPh+T1pbonACAot5wGbo=; b=IWlq6aPKMKMA2FnpNIz18JVjYZ 3EIjW1W+dAFWAxmu0wxvsHAhOQ20YkMhEH3Pm16fOY3frecOpmtyIsMSA+ZjGLTx3fP3zIHMQSLO2 dV4RUqKI/hIxb3G9EvZnXJH7l4RSDgTomDVYPgwD68LQtuITNgKRViwkYTRtltlLacadZpJOb6z1n F3j4VFONYqgAoCknLycFuYYBY2z6/ABMaw3CvhRoqD+SHKViMOuCish1TLcFpcX8YpCuEN+ewpclc UeFMdZtm8YVyJqtFkTxWuVeuHYuIZPWjXwYlM93jJ5R9SIKvJmhs4f5WePa5fXW/JRS479YSuSUZE 8acX/Zxg==; Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qQlsP-00E62D-0O for linux-arm-kernel@lists.infradead.org; Tue, 01 Aug 2023 09:41:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B956811FB; Tue, 1 Aug 2023 02:41:52 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.53.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 66ABF3F5A1; Tue, 1 Aug 2023 02:41:06 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Mark Rutland , linux-kernel@vger.kernel.org Subject: [PATCH V2 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device() Date: Tue, 1 Aug 2023 15:10:49 +0530 Message-Id: <20230801094052.750416-2-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230801094052.750416-1-anshuman.khandual@arm.com> References: <20230801094052.750416-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230801_104113_447846_106E35A3 X-CRM114-Status: GOOD ( 19.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Sanity checking all the GICC tables for same interrupt number, and ensuring a homogeneous ACPI based machine, could be used for other platform devices as well. Hence this refactors arm_spe_acpi_register_device() into a common helper arm_acpi_register_pmu_device(). Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Co-developed-by: Will Deacon Signed-off-by: Will Deacon Signed-off-by: Anshuman Khandual --- drivers/perf/arm_pmu_acpi.c | 110 +++++++++++++++++++++++------------- 1 file changed, 70 insertions(+), 40 deletions(-) diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c index 90815ad762eb..d9d5a7bbb92f 100644 --- a/drivers/perf/arm_pmu_acpi.c +++ b/drivers/perf/arm_pmu_acpi.c @@ -70,6 +70,68 @@ static void arm_pmu_acpi_unregister_irq(int cpu) } #if IS_ENABLED(CONFIG_ARM_SPE_PMU) +static int +arm_acpi_register_pmu_device(struct platform_device *pdev, u8 len, + u16 (*parse_gsi)(struct acpi_madt_generic_interrupt *)) +{ + int cpu, hetid, irq, ret; + bool matched = false; + u16 gsi = 0; + + /* + * Ensure that platform device must have IORESOURCE_IRQ + * resource to hold gsi interrupt. + */ + if (pdev->num_resources != 1) + return -ENXIO; + + if (pdev->resource[0].flags != IORESOURCE_IRQ) + return -ENXIO; + + /* + * Sanity check all the GICC tables for the same interrupt + * number. For now, only support homogeneous ACPI machines. + */ + for_each_possible_cpu(cpu) { + struct acpi_madt_generic_interrupt *gicc; + u16 this_gsi; + + gicc = acpi_cpu_get_madt_gicc(cpu); + if (gicc->header.length < len) + return matched ? -ENXIO : 0; + + this_gsi = parse_gsi(gicc); + if (!this_gsi) + return matched ? -ENXIO : 0; + + if (!matched) { + hetid = find_acpi_cpu_topology_hetero_id(cpu); + gsi = this_gsi; + matched = true; + } else if (hetid != find_acpi_cpu_topology_hetero_id(cpu) || + gsi != this_gsi) { + pr_warn("ACPI: %s: must be homogeneous\n", pdev->name); + return -ENXIO; + } + } + + irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH); + if (irq < 0) { + pr_warn("ACPI: %s Unable to register interrupt: %d\n", pdev->name, gsi); + return -ENXIO; + } + + pdev->resource[0].start = irq; + ret = platform_device_register(pdev); + if (ret < 0) { + pr_warn("ACPI: %s: Unable to register device\n", pdev->name); + acpi_unregister_gsi(gsi); + } + return ret; +} +#endif + +#ifdef CONFIG_ARM_SPE_PMU static struct resource spe_resources[] = { { /* irq */ @@ -84,6 +146,11 @@ static struct platform_device spe_dev = { .num_resources = ARRAY_SIZE(spe_resources) }; +static u16 arm_spe_parse_gsi(struct acpi_madt_generic_interrupt *gicc) +{ + return gicc->spe_interrupt; +} + /* * For lack of a better place, hook the normal PMU MADT walk * and create a SPE device if we detect a recent MADT with @@ -91,47 +158,10 @@ static struct platform_device spe_dev = { */ static void arm_spe_acpi_register_device(void) { - int cpu, hetid, irq, ret; - bool first = true; - u16 gsi = 0; - - /* - * Sanity check all the GICC tables for the same interrupt number. - * For now, we only support homogeneous ACPI/SPE machines. - */ - for_each_possible_cpu(cpu) { - struct acpi_madt_generic_interrupt *gicc; - - gicc = acpi_cpu_get_madt_gicc(cpu); - if (gicc->header.length < ACPI_MADT_GICC_SPE) - return; - - if (first) { - gsi = gicc->spe_interrupt; - if (!gsi) - return; - hetid = find_acpi_cpu_topology_hetero_id(cpu); - first = false; - } else if ((gsi != gicc->spe_interrupt) || - (hetid != find_acpi_cpu_topology_hetero_id(cpu))) { - pr_warn("ACPI: SPE must be homogeneous\n"); - return; - } - } - - irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, - ACPI_ACTIVE_HIGH); - if (irq < 0) { - pr_warn("ACPI: SPE Unable to register interrupt: %d\n", gsi); - return; - } - - spe_resources[0].start = irq; - ret = platform_device_register(&spe_dev); - if (ret < 0) { + int ret = arm_acpi_register_pmu_device(&spe_dev, ACPI_MADT_GICC_SPE, + arm_spe_parse_gsi); + if (ret) pr_warn("ACPI: SPE: Unable to register device\n"); - acpi_unregister_gsi(gsi); - } } #else static inline void arm_spe_acpi_register_device(void) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel