* [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
@ 2023-08-04 2:51 Elaine Zhang
2023-08-04 15:38 ` Conor Dooley
0 siblings, 1 reply; 5+ messages in thread
From: Elaine Zhang @ 2023-08-04 2:51 UTC (permalink / raw)
To: mturquette, sboyd, kever.yang, zhangqing, heiko, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: devicetree, linux-arm-kernel, linux-clk, linux-rockchip,
linux-kernel, huangtao
add PCLK_VO1GRF clk id.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
index b5616bca7b44..864a321ab362 100644
--- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
+++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
@@ -733,8 +733,9 @@
#define ACLK_AV1_PRE 718
#define PCLK_AV1_PRE 719
#define HCLK_SDIO_PRE 720
+#define PCLK_VO1GRF 721
-#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
+#define CLK_NR_CLKS (PCLK_VO1GRF + 1)
/* scmi-clocks indices */
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
2023-08-04 2:51 [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id Elaine Zhang
@ 2023-08-04 15:38 ` Conor Dooley
2023-08-07 8:41 ` Krzysztof Kozlowski
0 siblings, 1 reply; 5+ messages in thread
From: Conor Dooley @ 2023-08-04 15:38 UTC (permalink / raw)
To: Elaine Zhang
Cc: mturquette, sboyd, kever.yang, heiko, robh+dt,
krzysztof.kozlowski+dt, conor+dt, devicetree, linux-arm-kernel,
linux-clk, linux-rockchip, linux-kernel, huangtao
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On Fri, Aug 04, 2023 at 10:51:01AM +0800, Elaine Zhang wrote:
> add PCLK_VO1GRF clk id.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
> include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
> index b5616bca7b44..864a321ab362 100644
> --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
> +++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
> @@ -733,8 +733,9 @@
> #define ACLK_AV1_PRE 718
> #define PCLK_AV1_PRE 719
> #define HCLK_SDIO_PRE 720
> +#define PCLK_VO1GRF 721
>
> -#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
> +#define CLK_NR_CLKS (PCLK_VO1GRF + 1)
I only got this patch & not the rest of the series, so no idea what's
going in those patches, but since CLK_NR_CLKS was put in a dt-binding
header, is that value not now part of the ABI?
Thanks,
Conor.
>
> /* scmi-clocks indices */
>
> --
> 2.17.1
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
2023-08-04 15:38 ` Conor Dooley
@ 2023-08-07 8:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2023-08-07 8:41 UTC (permalink / raw)
To: Conor Dooley, Elaine Zhang
Cc: mturquette, sboyd, kever.yang, heiko, robh+dt,
krzysztof.kozlowski+dt, conor+dt, devicetree, linux-arm-kernel,
linux-clk, linux-rockchip, linux-kernel, huangtao
On 04/08/2023 17:38, Conor Dooley wrote:
> On Fri, Aug 04, 2023 at 10:51:01AM +0800, Elaine Zhang wrote:
>> add PCLK_VO1GRF clk id.
>>
>> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
>> ---
>> include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
>> index b5616bca7b44..864a321ab362 100644
>> --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
>> +++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
>> @@ -733,8 +733,9 @@
>> #define ACLK_AV1_PRE 718
>> #define PCLK_AV1_PRE 719
>> #define HCLK_SDIO_PRE 720
>> +#define PCLK_VO1GRF 721
>>
>> -#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
>> +#define CLK_NR_CLKS (PCLK_VO1GRF + 1)
>
> I only got this patch & not the rest of the series, so no idea what's
> going in those patches, but since CLK_NR_CLKS was put in a dt-binding
> header, is that value not now part of the ABI?
Technically yes, practically does not matter because no one should use
it. More bindings make the same mistakes, so it could be just dropped.
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [RESEND PATCH v3 0/4] rockchip: add GATE_LINK
@ 2023-08-07 6:59 Elaine Zhang
2023-08-07 6:59 ` [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id Elaine Zhang
0 siblings, 1 reply; 5+ messages in thread
From: Elaine Zhang @ 2023-08-07 6:59 UTC (permalink / raw)
To: mturquette, sboyd, kever.yang, zhangqing, heiko, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: devicetree, linux-arm-kernel, linux-clk, linux-rockchip,
linux-kernel, huangtao
Recent Rockchip SoCs have a new hardware block called Native Interface
Unit (NIU), which gates clocks to devices behind them. These effectively
need two parent clocks.
Use GATE_LINK to handle this.
change in V3:
[PATCH v3 1/4]: new, export clk_gate_endisable for PATCH2.
[PATCH v3 2/4]: reuse clk_gate_endisable and clk_gate_is_enabled.
add prepare and unprepare ops.
[PATCH v3 3/4]: No change
[PATCH v3 4/4]: reword commit message
change in V2:
[PATCH v2 1/3]: fix reported warnings
[PATCH v2 2/3]: Bindings submit independent patches
[PATCH v2 3/3]: fix reported warnings
Elaine Zhang (4):
clk: gate: export clk_gate_endisable
clk: rockchip: add support for gate link
dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
clk: rockchip: rk3588: Adjust the GATE_LINK parameter
drivers/clk/clk-gate.c | 3 +-
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk-gate-link.c | 120 ++++++++++++++++++
drivers/clk/rockchip/clk-rk3588.c | 110 ++++++++--------
drivers/clk/rockchip/clk.c | 7 +
drivers/clk/rockchip/clk.h | 22 ++++
.../dt-bindings/clock/rockchip,rk3588-cru.h | 3 +-
include/linux/clk-provider.h | 1 +
8 files changed, 214 insertions(+), 53 deletions(-)
create mode 100644 drivers/clk/rockchip/clk-gate-link.c
--
2.17.1
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^ permalink raw reply [flat|nested] 5+ messages in thread* [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
2023-08-07 6:59 [RESEND PATCH v3 0/4] rockchip: add GATE_LINK Elaine Zhang
@ 2023-08-07 6:59 ` Elaine Zhang
2023-08-07 8:41 ` Krzysztof Kozlowski
0 siblings, 1 reply; 5+ messages in thread
From: Elaine Zhang @ 2023-08-07 6:59 UTC (permalink / raw)
To: mturquette, sboyd, kever.yang, zhangqing, heiko, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: devicetree, linux-arm-kernel, linux-clk, linux-rockchip,
linux-kernel, huangtao
add PCLK_VO1GRF clk id.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
index b5616bca7b44..864a321ab362 100644
--- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
+++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
@@ -733,8 +733,9 @@
#define ACLK_AV1_PRE 718
#define PCLK_AV1_PRE 719
#define HCLK_SDIO_PRE 720
+#define PCLK_VO1GRF 721
-#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
+#define CLK_NR_CLKS (PCLK_VO1GRF + 1)
/* scmi-clocks indices */
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
2023-08-07 6:59 ` [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id Elaine Zhang
@ 2023-08-07 8:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2023-08-07 8:41 UTC (permalink / raw)
To: Elaine Zhang, mturquette, sboyd, kever.yang, heiko, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: devicetree, linux-arm-kernel, linux-clk, linux-rockchip,
linux-kernel, huangtao
On 07/08/2023 08:59, Elaine Zhang wrote:
> add PCLK_VO1GRF clk id.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
> include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Consider dropping CLK_NR_CLKS
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2023-08-04 15:38 ` Conor Dooley
2023-08-07 8:41 ` Krzysztof Kozlowski
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2023-08-07 6:59 [RESEND PATCH v3 0/4] rockchip: add GATE_LINK Elaine Zhang
2023-08-07 6:59 ` [RESEND PATCH v3 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id Elaine Zhang
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