[PATCH v2 0/3] sunxi: Orange Pi Zero 3 DT support

[PATCH v2 0/3] sunxi: Orange Pi Zero 3 DT support

[Andre Przywara]

Hi,

quick update of the series, mostly cosmetic fixes, except for the
regulator range. For a changelog, see below.

==================
Orange Pi recently released the Orange Pi Zero 3 board, which is some
updated version of their former Zero 2 development board. Some component
changes (Motorcomm PHY instead of Realtek, different PMIC), some board
layout changes, and it ships with up to 4GB of DRAM now. The SoC is now
labelled H618 instead of H616, which apparently is the same, just with
more L2 cache.

Split the existing OPi Zero2 DT, to allow sharing most DT nodes, then
add the binding documentation and DT for the new board.

Linux v6.5-rc boots out of the box (the PMIC driver just made it in),
and most things work: UART, PSCI, GPIO, SPI flash, SD card, USB.
Ethernet is somewhat working: I get an IP address via DHCP, and can
for instance start SSH, but it hangs at some point. I suspect some
PHY setup problem, though others have it working. Help or advice welcome.

Cheers,
Andre

Changelog v1 .. v2:
- rename common .dtsi file to sun50i-h616-orangepi-zero.dtsi
- add required Motorcomm PHY DT property to enable clock
- fix regulator ranges: VDD_CPU and VDD_GPU were swapped
- add comment about broken SD card detect
- reorder PMIC properties to match recommended order

Andre Przywara (3):
  arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT
  dt-bindings: arm: sunxi: document Orange Pi Zero 3 board name
  arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support

 .../devicetree/bindings/arm/sunxi.yaml        |   5 +
 arch/arm64/boot/dts/allwinner/Makefile        |   1 +
 .../allwinner/sun50i-h616-orangepi-zero.dtsi  | 134 ++++++++++++++++++
 .../allwinner/sun50i-h616-orangepi-zero2.dts  | 119 +---------------
 .../allwinner/sun50i-h618-orangepi-zero3.dts  |  94 ++++++++++++
 5 files changed, 235 insertions(+), 118 deletions(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts

-- 
2.25.1


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[PATCH v2 1/3] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT

[Andre Przywara]

The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some
DT nodes with the Zero 2, but comes with a different PMIC.

Move the common parts (except the PMIC) into a new shared file, and
include that from the existing board .dts file.

No functional change, the generated DTB is the same, except for some
phandle numbering differences.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../allwinner/sun50i-h616-orangepi-zero.dtsi  | 134 ++++++++++++++++++
 .../allwinner/sun50i-h616-orangepi-zero2.dts  | 119 +---------------
 2 files changed, 135 insertions(+), 118 deletions(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
new file mode 100644
index 0000000000000..8788c129b2887
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ *
+ * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3.
+ * Excludes PMIC nodes and properties, since they are different between the two.
+ */
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	aliases {
+		ethernet0 = &emac0;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+			default-state = "on";
+		};
+
+		led-1 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+		};
+	};
+
+	reg_vcc5v: vcc5v {
+		/* board wide 5V supply directly from the USB-C socket */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_usb1_vbus: regulator-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc5v>;
+		enable-active-high;
+		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+	};
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+/* USB 2 & 3 are on headers only. */
+
+&emac0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ext_rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	allwinner,rx-delay-ps = <3100>;
+	allwinner,tx-delay-ps = <700>;
+	status = "okay";
+};
+
+&mdio0 {
+	ext_rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
+&mmc0 {
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
+	bus-width = <4>;
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&spi0  {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+
+&usbotg {
+	/*
+	 * PHY0 pins are connected to a USB-C socket, but a role switch
+	 * is not implemented: both CC pins are pulled to GND.
+	 * The VBUS pins power the device, so a fixed peripheral mode
+	 * is the best choice.
+	 * The board can be powered via GPIOs, in this case port0 *can*
+	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
+	 * then provided by the GPIOs. Any user of this setup would
+	 * need to adjust the DT accordingly: dr_mode set to "host",
+	 * enabling OHCI0 and EHCI0.
+	 */
+	dr_mode = "peripheral";
+	status = "okay";
+};
+
+&usbphy {
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index cb8600d0ea1ef..d6e732b12c52d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -5,95 +5,19 @@
 
 /dts-v1/;
 
-#include "sun50i-h616.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/leds/common.h>
+#include "sun50i-h616-orangepi-zero.dtsi"
 
 / {
 	model = "OrangePi Zero2";
 	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
-
-	aliases {
-		ethernet0 = &emac0;
-		serial0 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led-0 {
-			function = LED_FUNCTION_POWER;
-			color = <LED_COLOR_ID_RED>;
-			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
-			default-state = "on";
-		};
-
-		led-1 {
-			function = LED_FUNCTION_STATUS;
-			color = <LED_COLOR_ID_GREEN>;
-			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
-		};
-	};
-
-	reg_vcc5v: vcc5v {
-		/* board wide 5V supply directly from the USB-C socket */
-		compatible = "regulator-fixed";
-		regulator-name = "vcc-5v";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	reg_usb1_vbus: regulator-usb1-vbus {
-		compatible = "regulator-fixed";
-		regulator-name = "usb1-vbus";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&reg_vcc5v>;
-		enable-active-high;
-		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
-	};
 };
 
-&ehci1 {
-	status = "okay";
-};
-
-/* USB 2 & 3 are on headers only. */
-
 &emac0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&ext_rgmii_pins>;
-	phy-mode = "rgmii";
-	phy-handle = <&ext_rgmii_phy>;
 	phy-supply = <&reg_dcdce>;
-	allwinner,rx-delay-ps = <3100>;
-	allwinner,tx-delay-ps = <700>;
-	status = "okay";
-};
-
-&mdio0 {
-	ext_rgmii_phy: ethernet-phy@1 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <1>;
-	};
 };
 
 &mmc0 {
 	vmmc-supply = <&reg_dcdce>;
-	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
-	bus-width = <4>;
-	status = "okay";
-};
-
-&ohci1 {
-	status = "okay";
 };
 
 &r_rsb {
@@ -211,44 +135,3 @@ &pio {
 	vcc-ph-supply = <&reg_aldo1>;
 	vcc-pi-supply = <&reg_aldo1>;
 };
-
-&spi0  {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
-
-	flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <40000000>;
-	};
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_ph_pins>;
-	status = "okay";
-};
-
-&usbotg {
-	/*
-	 * PHY0 pins are connected to a USB-C socket, but a role switch
-	 * is not implemented: both CC pins are pulled to GND.
-	 * The VBUS pins power the device, so a fixed peripheral mode
-	 * is the best choice.
-	 * The board can be powered via GPIOs, in this case port0 *can*
-	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
-	 * then provided by the GPIOs. Any user of this setup would
-	 * need to adjust the DT accordingly: dr_mode set to "host",
-	 * enabling OHCI0 and EHCI0.
-	 */
-	dr_mode = "peripheral";
-	status = "okay";
-};
-
-&usbphy {
-	usb1_vbus-supply = <&reg_usb1_vbus>;
-	status = "okay";
-};
-- 
2.25.1


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[PATCH v2 2/3] dt-bindings: arm: sunxi: document Orange Pi Zero 3 board name

[Andre Przywara]

The Orange Pi Zero 3 board is an updated version of the Zero 2 board.
It uses a SoC called H618, which just seems to be an H616 with more L2
cache.

Add the board/SoC compatible string pair to the list of known boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index ee8fdd2da869a..58f322b9585f2 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -997,4 +997,9 @@ properties:
           - const: xunlong,orangepi-zero2
           - const: allwinner,sun50i-h616
 
+      - description: Xunlong OrangePi Zero 3
+        items:
+          - const: xunlong,orangepi-zero3
+          - const: allwinner,sun50i-h618
+
 additionalProperties: true
-- 
2.25.1


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[PATCH v2 3/3] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support

[Andre Przywara]

The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC,
which seems to be just an H616 with more L2 cache. The board itself is a
slightly updated version of the Orange Pi Zero 2. It features:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
- AXP313a PMIC (more capable AXP305 on the Zero2)
- Raspberry-Pi-1 compatible GPIO header
- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
- 1 USB 2.0 host port
- 1 USB 2.0 type C port (power supply + OTG)
- MicroSD slot
- on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
- 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
- micro-HDMI port
- (yet) unsupported Allwinner WiFi/BT chip

Add the devicetree file describing the currently supported features,
namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
the moment, though the basic functionality works.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/Makefile        |  1 +
 .../allwinner/sun50i-h618-orangepi-zero3.dts  | 94 +++++++++++++++++++
 2 files changed, 95 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 6a96494a2e0a3..3b0ad54062381 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
new file mode 100644
index 0000000000000..96a6851728111
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-orangepi-zero.dtsi"
+
+/ {
+	model = "OrangePi Zero3";
+	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
+};
+
+&emac0 {
+	phy-supply = <&reg_dldo1>;
+};
+
+&ext_rgmii_phy {
+	motorcomm,clk-out-frequency-hz = <125000000>;
+};
+
+&mmc0 {
+	/*
+	 * The schematic shows the card detect pin wired up to PF6, via an
+	 * inverter, but it just doesn't work.
+	 */
+	broken-cd;
+	vmmc-supply = <&reg_dldo1>;
+};
+
+&r_i2c {
+	status = "okay";
+
+	axp313: pmic@36 {
+		compatible = "x-powers,axp313a";
+		reg = <0x36>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		interrupt-parent = <&pio>;
+		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 */
+
+		vin1-supply = <&reg_vcc5v>;
+		vin2-supply = <&reg_vcc5v>;
+		vin3-supply = <&reg_vcc5v>;
+
+		regulators {
+			/* Supplies VCC-PLL, so needs to be always on. */
+			reg_aldo1: aldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc1v8";
+			};
+
+			/* Supplies VCC-IO, so needs to be always on. */
+			reg_dldo1: dldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc3v3";
+			};
+
+			reg_dcdc1: dcdc1 {
+				regulator-always-on;
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <990000>;
+				regulator-name = "vdd-gpu-sys";
+			};
+
+			reg_dcdc2: dcdc2 {
+				regulator-always-on;
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-name = "vdd-cpu";
+			};
+
+			reg_dcdc3: dcdc3 {
+				regulator-always-on;
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-name = "vdd-dram";
+			};
+		};
+	};
+};
+
+&pio {
+	vcc-pc-supply = <&reg_dldo1>;
+	vcc-pf-supply = <&reg_dldo1>;
+	vcc-pg-supply = <&reg_aldo1>;
+	vcc-ph-supply = <&reg_dldo1>;
+	vcc-pi-supply = <&reg_dldo1>;
+};
-- 
2.25.1


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Re: [PATCH v2 1/3] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT

[Jernej Škrabec]

Dne petek, 04. avgust 2023 ob 19:08:54 CEST je Andre Przywara napisal(a):
> The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some
> DT nodes with the Zero 2, but comes with a different PMIC.
> 
> Move the common parts (except the PMIC) into a new shared file, and
> include that from the existing board .dts file.
> 
> No functional change, the generated DTB is the same, except for some
> phandle numbering differences.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> ---
>  .../allwinner/sun50i-h616-orangepi-zero.dtsi  | 134 ++++++++++++++++++
>  .../allwinner/sun50i-h616-orangepi-zero2.dts  | 119 +---------------
>  2 files changed, 135 insertions(+), 118 deletions(-)
>  create mode 100644
> arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi new file
> mode 100644
> index 0000000000000..8788c129b2887
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
> @@ -0,0 +1,134 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +/*
> + * Copyright (C) 2020 Arm Ltd.
> + *
> + * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3.
> + * Excludes PMIC nodes and properties, since they are different between the
> two. + */
> +
> +#include "sun50i-h616.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/leds/common.h>
> +
> +/ {
> +	aliases {
> +		ethernet0 = &emac0;
> +		serial0 = &uart0;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led-0 {
> +			function = LED_FUNCTION_POWER;
> +			color = <LED_COLOR_ID_RED>;
> +			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 
*/
> +			default-state = "on";
> +		};
> +
> +		led-1 {
> +			function = LED_FUNCTION_STATUS;
> +			color = <LED_COLOR_ID_GREEN>;
> +			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 
*/
> +		};
> +	};
> +
> +	reg_vcc5v: vcc5v {
> +		/* board wide 5V supply directly from the USB-C socket 
*/
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc-5v";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-always-on;
> +	};
> +
> +	reg_usb1_vbus: regulator-usb1-vbus {
> +		compatible = "regulator-fixed";
> +		regulator-name = "usb1-vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&reg_vcc5v>;
> +		enable-active-high;
> +		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
> +	};
> +};
> +
> +&ehci1 {
> +	status = "okay";
> +};
> +
> +/* USB 2 & 3 are on headers only. */
> +
> +&emac0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&ext_rgmii_pins>;
> +	phy-mode = "rgmii";
> +	phy-handle = <&ext_rgmii_phy>;
> +	allwinner,rx-delay-ps = <3100>;
> +	allwinner,tx-delay-ps = <700>;
> +	status = "okay";
> +};
> +
> +&mdio0 {
> +	ext_rgmii_phy: ethernet-phy@1 {
> +		compatible = "ethernet-phy-ieee802.3-c22";
> +		reg = <1>;
> +	};
> +};
> +
> +&mmc0 {
> +	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
> +	bus-width = <4>;
> +	status = "okay";
> +};
> +
> +&ohci1 {
> +	status = "okay";
> +};
> +
> +&spi0  {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
> +
> +	flash@0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		spi-max-frequency = <40000000>;
> +	};
> +};
> +
> +&uart0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart0_ph_pins>;
> +	status = "okay";
> +};
> +
> +&usbotg {
> +	/*
> +	 * PHY0 pins are connected to a USB-C socket, but a role switch
> +	 * is not implemented: both CC pins are pulled to GND.
> +	 * The VBUS pins power the device, so a fixed peripheral mode
> +	 * is the best choice.
> +	 * The board can be powered via GPIOs, in this case port0 *can*
> +	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
> +	 * then provided by the GPIOs. Any user of this setup would
> +	 * need to adjust the DT accordingly: dr_mode set to "host",
> +	 * enabling OHCI0 and EHCI0.
> +	 */
> +	dr_mode = "peripheral";
> +	status = "okay";
> +};
> +
> +&usbphy {
> +	usb1_vbus-supply = <&reg_usb1_vbus>;
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts index
> cb8600d0ea1ef..d6e732b12c52d 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> @@ -5,95 +5,19 @@
> 
>  /dts-v1/;
> 
> -#include "sun50i-h616.dtsi"
> -
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/interrupt-controller/arm-gic.h>
> -#include <dt-bindings/leds/common.h>
> +#include "sun50i-h616-orangepi-zero.dtsi"
> 
>  / {
>  	model = "OrangePi Zero2";
>  	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
> -
> -	aliases {
> -		ethernet0 = &emac0;
> -		serial0 = &uart0;
> -	};
> -
> -	chosen {
> -		stdout-path = "serial0:115200n8";
> -	};
> -
> -	leds {
> -		compatible = "gpio-leds";
> -
> -		led-0 {
> -			function = LED_FUNCTION_POWER;
> -			color = <LED_COLOR_ID_RED>;
> -			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* 
PC12 */
> -			default-state = "on";
> -		};
> -
> -		led-1 {
> -			function = LED_FUNCTION_STATUS;
> -			color = <LED_COLOR_ID_GREEN>;
> -			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* 
PC13 */
> -		};
> -	};
> -
> -	reg_vcc5v: vcc5v {
> -		/* board wide 5V supply directly from the USB-C socket 
*/
> -		compatible = "regulator-fixed";
> -		regulator-name = "vcc-5v";
> -		regulator-min-microvolt = <5000000>;
> -		regulator-max-microvolt = <5000000>;
> -		regulator-always-on;
> -	};
> -
> -	reg_usb1_vbus: regulator-usb1-vbus {
> -		compatible = "regulator-fixed";
> -		regulator-name = "usb1-vbus";
> -		regulator-min-microvolt = <5000000>;
> -		regulator-max-microvolt = <5000000>;
> -		vin-supply = <&reg_vcc5v>;
> -		enable-active-high;
> -		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
> -	};
>  };
> 
> -&ehci1 {
> -	status = "okay";
> -};
> -
> -/* USB 2 & 3 are on headers only. */
> -
>  &emac0 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&ext_rgmii_pins>;
> -	phy-mode = "rgmii";
> -	phy-handle = <&ext_rgmii_phy>;
>  	phy-supply = <&reg_dcdce>;
> -	allwinner,rx-delay-ps = <3100>;
> -	allwinner,tx-delay-ps = <700>;
> -	status = "okay";
> -};
> -
> -&mdio0 {
> -	ext_rgmii_phy: ethernet-phy@1 {
> -		compatible = "ethernet-phy-ieee802.3-c22";
> -		reg = <1>;
> -	};
>  };
> 
>  &mmc0 {
>  	vmmc-supply = <&reg_dcdce>;
> -	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
> -	bus-width = <4>;
> -	status = "okay";
> -};
> -
> -&ohci1 {
> -	status = "okay";
>  };
> 
>  &r_rsb {
> @@ -211,44 +135,3 @@ &pio {
>  	vcc-ph-supply = <&reg_aldo1>;
>  	vcc-pi-supply = <&reg_aldo1>;
>  };
> -
> -&spi0  {
> -	status = "okay";
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
> -
> -	flash@0 {
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -		compatible = "jedec,spi-nor";
> -		reg = <0>;
> -		spi-max-frequency = <40000000>;
> -	};
> -};
> -
> -&uart0 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&uart0_ph_pins>;
> -	status = "okay";
> -};
> -
> -&usbotg {
> -	/*
> -	 * PHY0 pins are connected to a USB-C socket, but a role switch
> -	 * is not implemented: both CC pins are pulled to GND.
> -	 * The VBUS pins power the device, so a fixed peripheral mode
> -	 * is the best choice.
> -	 * The board can be powered via GPIOs, in this case port0 *can*
> -	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
> -	 * then provided by the GPIOs. Any user of this setup would
> -	 * need to adjust the DT accordingly: dr_mode set to "host",
> -	 * enabling OHCI0 and EHCI0.
> -	 */
> -	dr_mode = "peripheral";
> -	status = "okay";
> -};
> -
> -&usbphy {
> -	usb1_vbus-supply = <&reg_usb1_vbus>;
> -	status = "okay";
> -};





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Re: [PATCH v2 2/3] dt-bindings: arm: sunxi: document Orange Pi Zero 3 board name

[Jernej Škrabec]

Dne petek, 04. avgust 2023 ob 19:08:55 CEST je Andre Przywara napisal(a):
> The Orange Pi Zero 3 board is an updated version of the Zero 2 board.
> It uses a SoC called H618, which just seems to be an H616 with more L2
> cache.
> 
> Add the board/SoC compatible string pair to the list of known boards.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> ---
>  Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
> b/Documentation/devicetree/bindings/arm/sunxi.yaml index
> ee8fdd2da869a..58f322b9585f2 100644
> --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> @@ -997,4 +997,9 @@ properties:
>            - const: xunlong,orangepi-zero2
>            - const: allwinner,sun50i-h616
> 
> +      - description: Xunlong OrangePi Zero 3
> +        items:
> +          - const: xunlong,orangepi-zero3
> +          - const: allwinner,sun50i-h618
> +
>  additionalProperties: true





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Re: [PATCH v2 3/3] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support

[Jernej Škrabec]

Dne petek, 04. avgust 2023 ob 19:08:56 CEST je Andre Przywara napisal(a):
> The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC,
> which seems to be just an H616 with more L2 cache. The board itself is a
> slightly updated version of the Orange Pi Zero 2. It features:
> - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
> - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
> - AXP313a PMIC (more capable AXP305 on the Zero2)
> - Raspberry-Pi-1 compatible GPIO header
> - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
> - 1 USB 2.0 host port
> - 1 USB 2.0 type C port (power supply + OTG)
> - MicroSD slot
> - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
> - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
> - micro-HDMI port
> - (yet) unsupported Allwinner WiFi/BT chip
> 
> Add the devicetree file describing the currently supported features,
> namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
> the moment, though the basic functionality works.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/allwinner/Makefile        |  1 +
>  .../allwinner/sun50i-h618-orangepi-zero3.dts  | 94 +++++++++++++++++++
>  2 files changed, 95 insertions(+)
>  create mode 100644
> arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> 
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile
> b/arch/arm64/boot/dts/allwinner/Makefile index 6a96494a2e0a3..3b0ad54062381
> 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts new file
> mode 100644
> index 0000000000000..96a6851728111
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> @@ -0,0 +1,94 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +/*
> + * Copyright (C) 2023 Arm Ltd.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-h616-orangepi-zero.dtsi"
> +
> +/ {
> +	model = "OrangePi Zero3";
> +	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
> +};
> +
> +&emac0 {
> +	phy-supply = <&reg_dldo1>;
> +};
> +
> +&ext_rgmii_phy {
> +	motorcomm,clk-out-frequency-hz = <125000000>;
> +};
> +
> +&mmc0 {
> +	/*
> +	 * The schematic shows the card detect pin wired up to PF6, via an
> +	 * inverter, but it just doesn't work.
> +	 */
> +	broken-cd;
> +	vmmc-supply = <&reg_dldo1>;
> +};
> +
> +&r_i2c {
> +	status = "okay";
> +
> +	axp313: pmic@36 {
> +		compatible = "x-powers,axp313a";
> +		reg = <0x36>;
> +		#interrupt-cells = <1>;
> +		interrupt-controller;
> +		interrupt-parent = <&pio>;
> +		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 */
> +
> +		vin1-supply = <&reg_vcc5v>;
> +		vin2-supply = <&reg_vcc5v>;
> +		vin3-supply = <&reg_vcc5v>;
> +
> +		regulators {
> +			/* Supplies VCC-PLL, so needs to be always 
on. */
> +			reg_aldo1: aldo1 {
> +				regulator-always-on;
> +				regulator-min-microvolt = 
<1800000>;
> +				regulator-max-microvolt = 
<1800000>;
> +				regulator-name = "vcc1v8";
> +			};
> +
> +			/* Supplies VCC-IO, so needs to be always on. 
*/
> +			reg_dldo1: dldo1 {
> +				regulator-always-on;
> +				regulator-min-microvolt = 
<3300000>;
> +				regulator-max-microvolt = 
<3300000>;
> +				regulator-name = "vcc3v3";
> +			};
> +
> +			reg_dcdc1: dcdc1 {
> +				regulator-always-on;
> +				regulator-min-microvolt = 
<810000>;
> +				regulator-max-microvolt = 
<990000>;
> +				regulator-name = "vdd-gpu-sys";
> +			};

Is it safe to change sys voltage when system is running?

Best regards,
Jernej

> +
> +			reg_dcdc2: dcdc2 {
> +				regulator-always-on;
> +				regulator-min-microvolt = 
<810000>;
> +				regulator-max-microvolt = 
<1100000>;
> +				regulator-name = "vdd-cpu";
> +			};
> +
> +			reg_dcdc3: dcdc3 {
> +				regulator-always-on;
> +				regulator-min-microvolt = 
<1100000>;
> +				regulator-max-microvolt = 
<1100000>;
> +				regulator-name = "vdd-dram";
> +			};
> +		};
> +	};
> +};
> +
> +&pio {
> +	vcc-pc-supply = <&reg_dldo1>;
> +	vcc-pf-supply = <&reg_dldo1>;
> +	vcc-pg-supply = <&reg_aldo1>;
> +	vcc-ph-supply = <&reg_dldo1>;
> +	vcc-pi-supply = <&reg_dldo1>;
> +};





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Re: [PATCH v2 3/3] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support

[Andre Przywara]

On Fri, 04 Aug 2023 21:05:36 +0200
Jernej Škrabec <jernej.skrabec@gmail.com> wrote:

Hi Jernej,

> Dne petek, 04. avgust 2023 ob 19:08:56 CEST je Andre Przywara napisal(a):
> > The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC,
> > which seems to be just an H616 with more L2 cache. The board itself is a
> > slightly updated version of the Orange Pi Zero 2. It features:
> > - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
> > - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
> > - AXP313a PMIC (more capable AXP305 on the Zero2)
> > - Raspberry-Pi-1 compatible GPIO header
> > - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
> > - 1 USB 2.0 host port
> > - 1 USB 2.0 type C port (power supply + OTG)
> > - MicroSD slot
> > - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
> > - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
> > - micro-HDMI port
> > - (yet) unsupported Allwinner WiFi/BT chip
> > 
> > Add the devicetree file describing the currently supported features,
> > namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
> > the moment, though the basic functionality works.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  arch/arm64/boot/dts/allwinner/Makefile        |  1 +
> >  .../allwinner/sun50i-h618-orangepi-zero3.dts  | 94 +++++++++++++++++++
> >  2 files changed, 95 insertions(+)
> >  create mode 100644
> > arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> > 
> > diff --git a/arch/arm64/boot/dts/allwinner/Makefile
> > b/arch/arm64/boot/dts/allwinner/Makefile index 6a96494a2e0a3..3b0ad54062381
> > 100644
> > --- a/arch/arm64/boot/dts/allwinner/Makefile
> > +++ b/arch/arm64/boot/dts/allwinner/Makefile
> > @@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
> >  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
> >  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
> >  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
> > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> > b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts new file
> > mode 100644
> > index 0000000000000..96a6851728111
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> > @@ -0,0 +1,94 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> > +/*
> > + * Copyright (C) 2023 Arm Ltd.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "sun50i-h616-orangepi-zero.dtsi"
> > +
> > +/ {
> > +	model = "OrangePi Zero3";
> > +	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
> > +};
> > +
> > +&emac0 {
> > +	phy-supply = <&reg_dldo1>;
> > +};
> > +
> > +&ext_rgmii_phy {
> > +	motorcomm,clk-out-frequency-hz = <125000000>;
> > +};
> > +
> > +&mmc0 {
> > +	/*
> > +	 * The schematic shows the card detect pin wired up to PF6, via an
> > +	 * inverter, but it just doesn't work.
> > +	 */
> > +	broken-cd;
> > +	vmmc-supply = <&reg_dldo1>;
> > +};
> > +
> > +&r_i2c {
> > +	status = "okay";
> > +
> > +	axp313: pmic@36 {
> > +		compatible = "x-powers,axp313a";
> > +		reg = <0x36>;
> > +		#interrupt-cells = <1>;
> > +		interrupt-controller;
> > +		interrupt-parent = <&pio>;
> > +		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 */
> > +
> > +		vin1-supply = <&reg_vcc5v>;
> > +		vin2-supply = <&reg_vcc5v>;
> > +		vin3-supply = <&reg_vcc5v>;
> > +
> > +		regulators {
> > +			/* Supplies VCC-PLL, so needs to be always   
> on. */
> > +			reg_aldo1: aldo1 {
> > +				regulator-always-on;
> > +				regulator-min-microvolt =   
> <1800000>;
> > +				regulator-max-microvolt =   
> <1800000>;
> > +				regulator-name = "vcc1v8";
> > +			};
> > +
> > +			/* Supplies VCC-IO, so needs to be always on.   
> */
> > +			reg_dldo1: dldo1 {
> > +				regulator-always-on;
> > +				regulator-min-microvolt =   
> <3300000>;
> > +				regulator-max-microvolt =   
> <3300000>;
> > +				regulator-name = "vcc3v3";
> > +			};
> > +
> > +			reg_dcdc1: dcdc1 {
> > +				regulator-always-on;
> > +				regulator-min-microvolt =   
> <810000>;
> > +				regulator-max-microvolt =   
> <990000>;
> > +				regulator-name = "vdd-gpu-sys";
> > +			};  
> 
> Is it safe to change sys voltage when system is running?

I don't know. All I know is that the H616 datasheet lists VDD_SYS as
having the exact same range as VDD_GPU, and that is does not give a
"typical" voltage value. As this DT stands at the moment, this doesn't
really matter, since nothing will change DCDC1.

I see that the Orange Pi Zero 2 (with a "proper" PMIC) also ties SYS and
GPU together, so it's not just because of the few rails of the AXP313.

I'd say we will figure that out once we start experimenting with GPU
DVFS, but meanwhile nothing references DCDC1, so it will just stay put
at the AXP313's 0.9V reset value.

Does that make sense?

Cheers,
Andre

> > +
> > +			reg_dcdc2: dcdc2 {
> > +				regulator-always-on;
> > +				regulator-min-microvolt =   
> <810000>;
> > +				regulator-max-microvolt =   
> <1100000>;
> > +				regulator-name = "vdd-cpu";
> > +			};
> > +
> > +			reg_dcdc3: dcdc3 {
> > +				regulator-always-on;
> > +				regulator-min-microvolt =   
> <1100000>;
> > +				regulator-max-microvolt =   
> <1100000>;
> > +				regulator-name = "vdd-dram";
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&pio {
> > +	vcc-pc-supply = <&reg_dldo1>;
> > +	vcc-pf-supply = <&reg_dldo1>;
> > +	vcc-pg-supply = <&reg_aldo1>;
> > +	vcc-ph-supply = <&reg_dldo1>;
> > +	vcc-pi-supply = <&reg_dldo1>;
> > +};  
> 
> 
> 
> 
> 


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Re: [PATCH v2 3/3] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support

[Jernej Škrabec]

Dne sobota, 05. avgust 2023 ob 00:58:27 CEST je Andre Przywara napisal(a):
> On Fri, 04 Aug 2023 21:05:36 +0200
> Jernej Škrabec <jernej.skrabec@gmail.com> wrote:
> 
> Hi Jernej,
> 
> > Dne petek, 04. avgust 2023 ob 19:08:56 CEST je Andre Przywara napisal(a):
> > > The OrangePi Zero 3 is a development board based on the Allwinner H618
> > > SoC,
> > > which seems to be just an H616 with more L2 cache. The board itself is a
> > > slightly updated version of the Orange Pi Zero 2. It features:
> > > - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
> > > - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
> > > - AXP313a PMIC (more capable AXP305 on the Zero2)
> > > - Raspberry-Pi-1 compatible GPIO header
> > > - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
> > > - 1 USB 2.0 host port
> > > - 1 USB 2.0 type C port (power supply + OTG)
> > > - MicroSD slot
> > > - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
> > > - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
> > > - micro-HDMI port
> > > - (yet) unsupported Allwinner WiFi/BT chip
> > > 
> > > Add the devicetree file describing the currently supported features,
> > > namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
> > > the moment, though the basic functionality works.
> > > 
> > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > ---
> > > 
> > >  arch/arm64/boot/dts/allwinner/Makefile        |  1 +
> > >  .../allwinner/sun50i-h618-orangepi-zero3.dts  | 94 +++++++++++++++++++
> > >  2 files changed, 95 insertions(+)
> > >  create mode 100644
> > > 
> > > arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> > > 
> > > diff --git a/arch/arm64/boot/dts/allwinner/Makefile
> > > b/arch/arm64/boot/dts/allwinner/Makefile index
> > > 6a96494a2e0a3..3b0ad54062381
> > > 100644
> > > --- a/arch/arm64/boot/dts/allwinner/Makefile
> > > +++ b/arch/arm64/boot/dts/allwinner/Makefile
> > > @@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
> > > 
> > >  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
> > >  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
> > >  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
> > > 
> > > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
> > > diff --git
> > > a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> > > b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts new file
> > > mode 100644
> > > index 0000000000000..96a6851728111
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> > > @@ -0,0 +1,94 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> > > +/*
> > > + * Copyright (C) 2023 Arm Ltd.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "sun50i-h616-orangepi-zero.dtsi"
> > > +
> > > +/ {
> > > +	model = "OrangePi Zero3";
> > > +	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
> > > +};
> > > +
> > > +&emac0 {
> > > +	phy-supply = <&reg_dldo1>;
> > > +};
> > > +
> > > +&ext_rgmii_phy {
> > > +	motorcomm,clk-out-frequency-hz = <125000000>;
> > > +};
> > > +
> > > +&mmc0 {
> > > +	/*
> > > +	 * The schematic shows the card detect pin wired up to PF6, via an
> > > +	 * inverter, but it just doesn't work.
> > > +	 */
> > > +	broken-cd;
> > > +	vmmc-supply = <&reg_dldo1>;
> > > +};
> > > +
> > > +&r_i2c {
> > > +	status = "okay";
> > > +
> > > +	axp313: pmic@36 {
> > > +		compatible = "x-powers,axp313a";
> > > +		reg = <0x36>;
> > > +		#interrupt-cells = <1>;
> > > +		interrupt-controller;
> > > +		interrupt-parent = <&pio>;
> > > +		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 
*/
> > > +
> > > +		vin1-supply = <&reg_vcc5v>;
> > > +		vin2-supply = <&reg_vcc5v>;
> > > +		vin3-supply = <&reg_vcc5v>;
> > > +
> > > +		regulators {
> > > +			/* Supplies VCC-PLL, so needs to be always
> > 
> > on. */
> > 
> > > +			reg_aldo1: aldo1 {
> > > +				regulator-always-on;
> > > +				regulator-min-microvolt =
> > 
> > <1800000>;
> > 
> > > +				regulator-max-microvolt =
> > 
> > <1800000>;
> > 
> > > +				regulator-name = "vcc1v8";
> > > +			};
> > > +
> > > +			/* Supplies VCC-IO, so needs to be always 
on.
> > 
> > */
> > 
> > > +			reg_dldo1: dldo1 {
> > > +				regulator-always-on;
> > > +				regulator-min-microvolt =
> > 
> > <3300000>;
> > 
> > > +				regulator-max-microvolt =
> > 
> > <3300000>;
> > 
> > > +				regulator-name = "vcc3v3";
> > > +			};
> > > +
> > > +			reg_dcdc1: dcdc1 {
> > > +				regulator-always-on;
> > > +				regulator-min-microvolt =
> > 
> > <810000>;
> > 
> > > +				regulator-max-microvolt =
> > 
> > <990000>;
> > 
> > > +				regulator-name = "vdd-gpu-sys";
> > > +			};
> > 
> > Is it safe to change sys voltage when system is running?
> 
> I don't know. All I know is that the H616 datasheet lists VDD_SYS as
> having the exact same range as VDD_GPU, and that is does not give a
> "typical" voltage value. As this DT stands at the moment, this doesn't
> really matter, since nothing will change DCDC1.
> 
> I see that the Orange Pi Zero 2 (with a "proper" PMIC) also ties SYS and
> GPU together, so it's not just because of the few rails of the AXP313.
> 
> I'd say we will figure that out once we start experimenting with GPU
> DVFS, but meanwhile nothing references DCDC1, so it will just stay put
> at the AXP313's 0.9V reset value.
> 
> Does that make sense?

Yeah, I'm fine with it.

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> 
> Cheers,
> Andre
> 
> > > +
> > > +			reg_dcdc2: dcdc2 {
> > > +				regulator-always-on;
> > > +				regulator-min-microvolt =
> > 
> > <810000>;
> > 
> > > +				regulator-max-microvolt =
> > 
> > <1100000>;
> > 
> > > +				regulator-name = "vdd-cpu";
> > > +			};
> > > +
> > > +			reg_dcdc3: dcdc3 {
> > > +				regulator-always-on;
> > > +				regulator-min-microvolt =
> > 
> > <1100000>;
> > 
> > > +				regulator-max-microvolt =
> > 
> > <1100000>;
> > 
> > > +				regulator-name = "vdd-dram";
> > > +			};
> > > +		};
> > > +	};
> > > +};
> > > +
> > > +&pio {
> > > +	vcc-pc-supply = <&reg_dldo1>;
> > > +	vcc-pf-supply = <&reg_dldo1>;
> > > +	vcc-pg-supply = <&reg_aldo1>;
> > > +	vcc-ph-supply = <&reg_dldo1>;
> > > +	vcc-pi-supply = <&reg_dldo1>;
> > > +};





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Re: [PATCH v2 0/3] sunxi: Orange Pi Zero 3 DT support

[Jernej Škrabec]

Dne petek, 04. avgust 2023 ob 19:08:53 CEST je Andre Przywara napisal(a):
> Hi,
> 
> quick update of the series, mostly cosmetic fixes, except for the
> regulator range. For a changelog, see below.
> 
> ==================
> Orange Pi recently released the Orange Pi Zero 3 board, which is some
> updated version of their former Zero 2 development board. Some component
> changes (Motorcomm PHY instead of Realtek, different PMIC), some board
> layout changes, and it ships with up to 4GB of DRAM now. The SoC is now
> labelled H618 instead of H616, which apparently is the same, just with
> more L2 cache.
> 
> Split the existing OPi Zero2 DT, to allow sharing most DT nodes, then
> add the binding documentation and DT for the new board.
> 
> Linux v6.5-rc boots out of the box (the PMIC driver just made it in),
> and most things work: UART, PSCI, GPIO, SPI flash, SD card, USB.
> Ethernet is somewhat working: I get an IP address via DHCP, and can
> for instance start SSH, but it hangs at some point. I suspect some
> PHY setup problem, though others have it working. Help or advice welcome.

Applied, thanks!

Best regards,
Jernej

> 
> Cheers,
> Andre
> 
> Changelog v1 .. v2:
> - rename common .dtsi file to sun50i-h616-orangepi-zero.dtsi
> - add required Motorcomm PHY DT property to enable clock
> - fix regulator ranges: VDD_CPU and VDD_GPU were swapped
> - add comment about broken SD card detect
> - reorder PMIC properties to match recommended order
> 
> Andre Przywara (3):
>   arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT
>   dt-bindings: arm: sunxi: document Orange Pi Zero 3 board name
>   arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support
> 
>  .../devicetree/bindings/arm/sunxi.yaml        |   5 +
>  arch/arm64/boot/dts/allwinner/Makefile        |   1 +
>  .../allwinner/sun50i-h616-orangepi-zero.dtsi  | 134 ++++++++++++++++++
>  .../allwinner/sun50i-h616-orangepi-zero2.dts  | 119 +---------------
>  .../allwinner/sun50i-h618-orangepi-zero3.dts  |  94 ++++++++++++
>  5 files changed, 235 insertions(+), 118 deletions(-)
>  create mode 100644
> arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi create mode
> 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts





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