* [PATCH 0/3] arm64: dts: ti: k3-j784s4: Add bootph-pre-ram property for SPL nodes
@ 2023-08-06 16:48 Apurva Nandan
2023-08-06 16:48 ` [PATCH 1/3] arm64: dts: ti: k3-j784s4-main: " Apurva Nandan
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Apurva Nandan @ 2023-08-06 16:48 UTC (permalink / raw)
To: Apurva Nandan, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Udit Kumar, Hari Nagalla
Add bootph-pre-ram property for all the nodes used in SPL stage,
for syncing it later to u-boot j784s4 dts.
This series will be ported to the u-boot k3-j784s4 support patch series,
and was requested in its review process:
https://lore.kernel.org/u-boot/20230321155227.GV8135@bill-the-cat/
Apurva Nandan (3):
arm64: dts: ti: k3-j784s4-main: Add bootph-pre-ram property for SPL
nodes
arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for
SPL nodes
arm64: dts: ti: k3-j784s4-evm: Add bootph-pre-ram property for SPL
nodes
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 23 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 3 +++
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 9 ++++++++
3 files changed, 35 insertions(+)
--
2.34.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/3] arm64: dts: ti: k3-j784s4-main: Add bootph-pre-ram property for SPL nodes
2023-08-06 16:48 [PATCH 0/3] arm64: dts: ti: k3-j784s4: Add bootph-pre-ram property for SPL nodes Apurva Nandan
@ 2023-08-06 16:48 ` Apurva Nandan
2023-08-06 16:48 ` [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: " Apurva Nandan
2023-08-06 16:48 ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: " Apurva Nandan
2 siblings, 0 replies; 10+ messages in thread
From: Apurva Nandan @ 2023-08-06 16:48 UTC (permalink / raw)
To: Apurva Nandan, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Udit Kumar, Hari Nagalla
Add bootph-pre-ram property for all the nodes used in SPL stage,
for syncing it later to u-boot j784s4 dts.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index a04c44708a09..6bba73c8f359 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -6,6 +6,7 @@
*/
&cbass_main {
+ bootph-pre-ram;
msmc_ram: sram@70000000 {
compatible = "mmio-sram";
reg = <0x00 0x70000000 0x00 0x800000>;
@@ -670,6 +671,7 @@ main_sdhci1: mmc@4fb0000 {
};
main_navss: bus@30000000 {
+ bootph-pre-ram;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -705,6 +707,7 @@ main_udmass_inta: msi-controller@33d00000 {
};
secure_proxy_main: mailbox@32c00000 {
+ bootph-pre-ram;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
--
2.34.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for SPL nodes
2023-08-06 16:48 [PATCH 0/3] arm64: dts: ti: k3-j784s4: Add bootph-pre-ram property for SPL nodes Apurva Nandan
2023-08-06 16:48 ` [PATCH 1/3] arm64: dts: ti: k3-j784s4-main: " Apurva Nandan
@ 2023-08-06 16:48 ` Apurva Nandan
2023-08-07 4:31 ` Kumar, Udit
2023-08-06 16:48 ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: " Apurva Nandan
2 siblings, 1 reply; 10+ messages in thread
From: Apurva Nandan @ 2023-08-06 16:48 UTC (permalink / raw)
To: Apurva Nandan, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Udit Kumar, Hari Nagalla
Add bootph-pre-ram property for all the nodes used in SPL stage,
for syncing it later to u-boot j784s4 dts.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 740ee794d7b9..57bf0261c343 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -6,7 +6,9 @@
*/
&cbass_mcu_wakeup {
+ bootph-pre-ram;
sms: system-controller@44083000 {
+ bootph-pre-ram;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
@@ -19,22 +21,26 @@ sms: system-controller@44083000 {
reg = <0x00 0x44083000 0x00 0x1000>;
k3_pds: power-controller {
+ bootph-pre-ram;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
+ bootph-pre-ram;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
+ bootph-pre-ram;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
};
chipid@43000014 {
+ bootph-pre-ram;
compatible = "ti,am654-chipid";
reg = <0x00 0x43000014 0x00 0x4>;
};
@@ -442,6 +448,7 @@ mcu_spi2: spi@40320000 {
};
mcu_navss: bus@28380000 {
+ bootph-pre-ram;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -451,6 +458,7 @@ mcu_navss: bus@28380000 {
dma-ranges;
mcu_ringacc: ringacc@2b800000 {
+ bootph-pre-ram;
compatible = "ti,am654-navss-ringacc";
reg = <0x00 0x2b800000 0x00 0x400000>,
<0x00 0x2b000000 0x00 0x400000>,
@@ -465,6 +473,7 @@ mcu_ringacc: ringacc@2b800000 {
};
mcu_udmap: dma-controller@285c0000 {
+ bootph-pre-ram;
compatible = "ti,j721e-navss-mcu-udmap";
reg = <0x00 0x285c0000 0x00 0x100>,
<0x00 0x2a800000 0x00 0x40000>,
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: Add bootph-pre-ram property for SPL nodes
2023-08-06 16:48 [PATCH 0/3] arm64: dts: ti: k3-j784s4: Add bootph-pre-ram property for SPL nodes Apurva Nandan
2023-08-06 16:48 ` [PATCH 1/3] arm64: dts: ti: k3-j784s4-main: " Apurva Nandan
2023-08-06 16:48 ` [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: " Apurva Nandan
@ 2023-08-06 16:48 ` Apurva Nandan
2023-08-07 4:34 ` Kumar, Udit
2023-08-07 12:48 ` Nishanth Menon
2 siblings, 2 replies; 10+ messages in thread
From: Apurva Nandan @ 2023-08-06 16:48 UTC (permalink / raw)
To: Apurva Nandan, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Udit Kumar, Hari Nagalla
Add bootph-pre-ram property for all the nodes used in SPL stage,
for syncing it later to u-boot j784s4 dts.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index 1e38a8f1bec5..12455baf68b0 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -252,7 +252,9 @@ vdd_sd_dv: regulator-TLV71033 {
};
&main_pmx0 {
+ bootph-pre-ram;
main_uart8_pins_default: main-uart8-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */
J784S4_IOPAD(0x044, PIN_OUTPUT, 14) /* (AG37) MCASP0_AXR1.UART8_RTSn */
@@ -269,6 +271,7 @@ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
};
main_mmc1_pins_default: main-mmc1-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
@@ -289,7 +292,9 @@ J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */
};
&wkup_pmx2 {
+ bootph-pre-ram;
wkup_uart0_pins_default: wkup-uart0-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
@@ -299,6 +304,7 @@ J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
@@ -306,6 +312,7 @@ J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
};
mcu_uart0_pins_default: mcu-uart0-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (H37) WKUP_GPIO0_14.MCU_UART0_CTSn */
J784S4_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (K37) WKUP_GPIO0_15.MCU_UART0_RTSn */
@@ -366,7 +373,9 @@ J784S4_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */
};
&wkup_pmx0 {
+ bootph-pre-ram;
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
@@ -385,6 +394,7 @@ J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_CSn2.MCU_OSPI0_RESET_
};
mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
@@ -399,6 +409,7 @@ J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
};
&wkup_uart0 {
+ bootph-pre-ram;
/* Firmware usage */
status = "reserved";
pinctrl-names = "default";
@@ -406,6 +417,7 @@ &wkup_uart0 {
};
&wkup_i2c0 {
+ bootph-pre-ram;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
@@ -419,12 +431,14 @@ eeprom@50 {
};
&mcu_uart0 {
+ bootph-pre-ram;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
};
&main_uart8 {
+ bootph-pre-ram;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart8_pins_default>;
@@ -435,15 +449,18 @@ &ufs_wrapper {
};
&fss {
+ bootph-pre-ram;
status = "okay";
};
&ospi0 {
+ bootph-pre-ram;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
flash@0 {
+ bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -491,6 +508,7 @@ partition@800000 {
};
partition@3fc0000 {
+ bootph-pre-ram;
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
};
@@ -499,11 +517,13 @@ partition@3fc0000 {
};
&ospi1 {
+ bootph-pre-ram;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
flash@0 {
+ bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
@@ -551,6 +571,7 @@ partition@800000 {
};
partition@3fc0000 {
+ bootph-pre-ram;
label = "qspi.phypattern";
reg = <0x3fc0000 0x40000>;
};
@@ -595,6 +616,7 @@ exp2: gpio@22 {
};
&main_sdhci0 {
+ bootph-pre-ram;
/* eMMC */
status = "okay";
non-removable;
@@ -603,6 +625,7 @@ &main_sdhci0 {
};
&main_sdhci1 {
+ bootph-pre-ram;
/* SD card */
status = "okay";
pinctrl-0 = <&main_mmc1_pins_default>;
--
2.34.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for SPL nodes
2023-08-06 16:48 ` [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: " Apurva Nandan
@ 2023-08-07 4:31 ` Kumar, Udit
2023-08-07 17:13 ` Apurva Nandan
0 siblings, 1 reply; 10+ messages in thread
From: Kumar, Udit @ 2023-08-07 4:31 UTC (permalink / raw)
To: Apurva Nandan, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Hari Nagalla
Hi Apurva
On 8/6/2023 10:18 PM, Apurva Nandan wrote:
> Add bootph-pre-ram property for all the nodes used in SPL stage,
> for syncing it later to u-boot j784s4 dts.
>
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index 740ee794d7b9..57bf0261c343 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -6,7 +6,9 @@
> */
>
> &cbass_mcu_wakeup {
> + bootph-pre-ram;
> sms: system-controller@44083000 {
> + bootph-pre-ram;
> compatible = "ti,k2g-sci";
> ti,host-id = <12>;
>
> @@ -19,22 +21,26 @@ sms: system-controller@44083000 {
> reg = <0x00 0x44083000 0x00 0x1000>;
>
> k3_pds: power-controller {
> + bootph-pre-ram;
> compatible = "ti,sci-pm-domain";
> #power-domain-cells = <2>;
> };
>
> k3_clks: clock-controller {
> + bootph-pre-ram;
> compatible = "ti,k2g-sci-clk";
> #clock-cells = <2>;
> };
>
> k3_reset: reset-controller {
> + bootph-pre-ram;
> compatible = "ti,sci-reset";
> #reset-cells = <2>;
> };
> };
>
> chipid@43000014 {
> + bootph-pre-ram;
> compatible = "ti,am654-chipid";
> reg = <0x00 0x43000014 0x00 0x4>;
> };
> @@ -442,6 +448,7 @@ mcu_spi2: spi@40320000 {
> };
mcu_timer0: timer@40400000 should be part of your list.
>
> mcu_navss: bus@28380000 {
> + bootph-pre-ram;
> compatible = "simple-bus";
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -451,6 +458,7 @@ mcu_navss: bus@28380000 {
> dma-ranges;
>
> mcu_ringacc: ringacc@2b800000 {
> + bootph-pre-ram;
> compatible = "ti,am654-navss-ringacc";
> reg = <0x00 0x2b800000 0x00 0x400000>,
> <0x00 0x2b000000 0x00 0x400000>,
> @@ -465,6 +473,7 @@ mcu_ringacc: ringacc@2b800000 {
> };
>
> mcu_udmap: dma-controller@285c0000 {
> + bootph-pre-ram;
> compatible = "ti,j721e-navss-mcu-udmap";
> reg = <0x00 0x285c0000 0x00 0x100>,
> <0x00 0x2a800000 0x00 0x40000>,
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: Add bootph-pre-ram property for SPL nodes
2023-08-06 16:48 ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: " Apurva Nandan
@ 2023-08-07 4:34 ` Kumar, Udit
2023-08-07 12:48 ` Nishanth Menon
1 sibling, 0 replies; 10+ messages in thread
From: Kumar, Udit @ 2023-08-07 4:34 UTC (permalink / raw)
To: Apurva Nandan, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Hari Nagalla
Hi Apurva,
On 8/6/2023 10:18 PM, Apurva Nandan wrote:
> Add bootph-pre-ram property for all the nodes used in SPL stage,
> for syncing it later to u-boot j784s4 dts.
>
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index 1e38a8f1bec5..12455baf68b0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -252,7 +252,9 @@ vdd_sd_dv: regulator-TLV71033 {
> };
>
> &main_pmx0 {
> [...]
>
> mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
> + bootph-pre-ram;
> pinctrl-single,pins = <
> J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
> J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
Unfortunately this is not under correct pin mux , OSPI1 falls under
wkup_pmx1.
Patch under review is
https://lore.kernel.org/all/20230802114126.162445-1-u-kumar1@ti.com/
> @@ -399,6 +409,7 @@ J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
> };
> [...]
>
>
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: Add bootph-pre-ram property for SPL nodes
2023-08-06 16:48 ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: " Apurva Nandan
2023-08-07 4:34 ` Kumar, Udit
@ 2023-08-07 12:48 ` Nishanth Menon
1 sibling, 0 replies; 10+ messages in thread
From: Nishanth Menon @ 2023-08-07 12:48 UTC (permalink / raw)
To: Apurva Nandan
Cc: Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel, Udit Kumar, Hari Nagalla
On 22:18-20230806, Apurva Nandan wrote:
> Add bootph-pre-ram property for all the nodes used in SPL stage,
> for syncing it later to u-boot j784s4 dts.
>
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 23 +++++++++++++++++++++++
am69-sk is missing in the series.
but thanks for starting on this series.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for SPL nodes
2023-08-07 4:31 ` Kumar, Udit
@ 2023-08-07 17:13 ` Apurva Nandan
2023-08-07 17:21 ` Nishanth Menon
0 siblings, 1 reply; 10+ messages in thread
From: Apurva Nandan @ 2023-08-07 17:13 UTC (permalink / raw)
To: Kumar, Udit, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel, Hari Nagalla
On 07/08/23 10:01, Kumar, Udit wrote:
> Hi Apurva
>
> On 8/6/2023 10:18 PM, Apurva Nandan wrote:
>> Add bootph-pre-ram property for all the nodes used in SPL stage,
>> for syncing it later to u-boot j784s4 dts.
>>
>> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> index 740ee794d7b9..57bf0261c343 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> @@ -6,7 +6,9 @@
>> */
>> &cbass_mcu_wakeup {
>> + bootph-pre-ram;
>> sms: system-controller@44083000 {
>> + bootph-pre-ram;
>> compatible = "ti,k2g-sci";
>> ti,host-id = <12>;
>> @@ -19,22 +21,26 @@ sms: system-controller@44083000 {
>> reg = <0x00 0x44083000 0x00 0x1000>;
>> k3_pds: power-controller {
>> + bootph-pre-ram;
>> compatible = "ti,sci-pm-domain";
>> #power-domain-cells = <2>;
>> };
>> k3_clks: clock-controller {
>> + bootph-pre-ram;
>> compatible = "ti,k2g-sci-clk";
>> #clock-cells = <2>;
>> };
>> k3_reset: reset-controller {
>> + bootph-pre-ram;
>> compatible = "ti,sci-reset";
>> #reset-cells = <2>;
>> };
>> };
>> chipid@43000014 {
>> + bootph-pre-ram;
>> compatible = "ti,am654-chipid";
>> reg = <0x00 0x43000014 0x00 0x4>;
>> };
>> @@ -442,6 +448,7 @@ mcu_spi2: spi@40320000 {
>> };
>
>
> mcu_timer0: timer@40400000 should be part of your list.
Maybe you are referring to mcu_timer1. mcu_timer1 will be a part of
u-boot.dtsi as we need to edit
the node for removing k3_clks and power-domains properties from it. So
we should add bootph-pre-ram
there itself in uboot.dtsi as the node will be already there.
>
>> mcu_navss: bus@28380000 {
>> + bootph-pre-ram;
>> compatible = "simple-bus";
>> #address-cells = <2>;
>> #size-cells = <2>;
>> @@ -451,6 +458,7 @@ mcu_navss: bus@28380000 {
>> dma-ranges;
>> mcu_ringacc: ringacc@2b800000 {
>> + bootph-pre-ram;
>> compatible = "ti,am654-navss-ringacc";
>> reg = <0x00 0x2b800000 0x00 0x400000>,
>> <0x00 0x2b000000 0x00 0x400000>,
>> @@ -465,6 +473,7 @@ mcu_ringacc: ringacc@2b800000 {
>> };
>> mcu_udmap: dma-controller@285c0000 {
>> + bootph-pre-ram;
>> compatible = "ti,j721e-navss-mcu-udmap";
>> reg = <0x00 0x285c0000 0x00 0x100>,
>> <0x00 0x2a800000 0x00 0x40000>,
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for SPL nodes
2023-08-07 17:13 ` Apurva Nandan
@ 2023-08-07 17:21 ` Nishanth Menon
2023-08-07 17:25 ` Apurva Nandan
0 siblings, 1 reply; 10+ messages in thread
From: Nishanth Menon @ 2023-08-07 17:21 UTC (permalink / raw)
To: Apurva Nandan
Cc: Kumar, Udit, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel, Hari Nagalla
On 22:43-20230807, Apurva Nandan wrote:
[..]
> > mcu_timer0: timer@40400000 should be part of your list.
> Maybe you are referring to mcu_timer1. mcu_timer1 will be a part of
> u-boot.dtsi as we need to edit
> the node for removing k3_clks and power-domains properties from it. So we
> should add bootph-pre-ram
> there itself in uboot.dtsi as the node will be already there.
a) you need the timer even before talking to anything - u-boot needs it
for basic delay - so add the pre-ram property.
b) what you are doing in u-boot currently a hack - am625 in u-boot got
it fixed the right way - follow the model then you dont need the hackery
with deleting clock and power-domains properties.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: Add bootph-pre-ram property for SPL nodes
2023-08-07 17:21 ` Nishanth Menon
@ 2023-08-07 17:25 ` Apurva Nandan
0 siblings, 0 replies; 10+ messages in thread
From: Apurva Nandan @ 2023-08-07 17:25 UTC (permalink / raw)
To: Nishanth Menon
Cc: Kumar, Udit, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel, Hari Nagalla
On 07/08/23 22:51, Nishanth Menon wrote:
> On 22:43-20230807, Apurva Nandan wrote:
> [..]
>
>>> mcu_timer0: timer@40400000 should be part of your list.
>> Maybe you are referring to mcu_timer1. mcu_timer1 will be a part of
>> u-boot.dtsi as we need to edit
>> the node for removing k3_clks and power-domains properties from it. So we
>> should add bootph-pre-ram
>> there itself in uboot.dtsi as the node will be already there.
> a) you need the timer even before talking to anything - u-boot needs it
> for basic delay - so add the pre-ram property.
> b) what you are doing in u-boot currently a hack - am625 in u-boot got
> it fixed the right way - follow the model then you dont need the hackery
> with deleting clock and power-domains properties.
>
Okay, thanks!
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-08-07 17:26 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2023-08-06 16:48 [PATCH 0/3] arm64: dts: ti: k3-j784s4: Add bootph-pre-ram property for SPL nodes Apurva Nandan
2023-08-06 16:48 ` [PATCH 1/3] arm64: dts: ti: k3-j784s4-main: " Apurva Nandan
2023-08-06 16:48 ` [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu-wakeup: " Apurva Nandan
2023-08-07 4:31 ` Kumar, Udit
2023-08-07 17:13 ` Apurva Nandan
2023-08-07 17:21 ` Nishanth Menon
2023-08-07 17:25 ` Apurva Nandan
2023-08-06 16:48 ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: " Apurva Nandan
2023-08-07 4:34 ` Kumar, Udit
2023-08-07 12:48 ` Nishanth Menon
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