From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B312AC001B0 for ; Mon, 7 Aug 2023 23:10:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6e6vgX+RkAyVERU1EWrCcIukG1SDqzPmqcNsI+J+67A=; b=tn09+XAi2Q5pof BjH328HfAxQRugzT0QaalnZTtyuUz2tx/JuhA9/a8lRudibjdga125dD5ktFg19oZYKNnWHPA+bjp W0+DeyoT3DbKz/f3yJdAMKkEXuborDLQnJGw6AOLFTUCRz2QNxqltLiR4lrGfx/VeRYBUxSFCPENF dkcZwcyh+LMovwbZH3NMH/wHINOFh0OmEzrqbqPaoGz3H4FWHOb5OlYUj1TEhYpAPyuDAKk8mQS+U 6Df9qnYjGxFeg6RRJ6sV83vg6TDbzV3LqyGIODscVN5ZtvJrssB3yNvKpk6I1XYmk/BdX1N/7uwME x/8ANqK3+qDSGqe61wtw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qT9MF-0019Nn-1b; Mon, 07 Aug 2023 23:09:51 +0000 Received: from mgamail.intel.com ([134.134.136.24]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qT9MA-0019Ih-0U for linux-arm-kernel@lists.infradead.org; Mon, 07 Aug 2023 23:09:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1691449786; x=1722985786; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=Vi6hfPbn60L9k1Tr00fN5O9EH/H7aS97NxOK0jd1tMk=; b=G5eUs2IXp+A0zawwrVZoDZFk21JrXF5noXLFBI2+PDZwnZTDEHU4ggqX 0S1GwABsUrBeK+68IZantghoudRLbEWNQNe8YrRTJLunbxJ+Owj/TQuJr q9ohqhV8Z/to985YGZRxBpJxdAmnlUsX18FN1dHAIdlEG+ba/swHzTDIn B4WQlhab1fBirOtej8o+zt7niG3tBmdQHN23VGWypiyNjyBwJlU1RW8nR RRPxFtRYlkOL+mzIpPVRBz7sKiBDXAUmC+zTxH0wlO4xEczFmN0PU5nyE iFWYntAjdTzftgvmx1anTHasLxlzkNtMl8fX/dIRQwRCu+bBjJBiJ9dJv g==; X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="373424074" X-IronPort-AV: E=Sophos;i="6.01,263,1684825200"; d="scan'208";a="373424074" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2023 16:09:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="760679372" X-IronPort-AV: E=Sophos;i="6.01,263,1684825200"; d="scan'208";a="760679372" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orsmga008.jf.intel.com with ESMTP; 07 Aug 2023 16:09:43 -0700 Date: Mon, 7 Aug 2023 16:12:16 -0700 From: Ricardo Neri To: Radu Rendec Cc: x86@kernel.org, Andreas Herrmann , Catalin Marinas , Chen Yu , Len Brown , Pierre Gondois , Pu Wen , "Rafael J. Wysocki" , Sudeep Holla , Srinivas Pandruvada , Will Deacon , Zhang Rui , stable@vger.kernel.org, Ricardo Neri , "Ravi V. Shankar" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 1/3] cacheinfo: Allocate memory for memory if not done from the primary CPU Message-ID: <20230807231216.GA18573@ranerica-svr.sc.intel.com> References: <20230805012421.7002-1-ricardo.neri-calderon@linux.intel.com> <20230805012421.7002-2-ricardo.neri-calderon@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230807_160946_687565_390B349C X-CRM114-Status: GOOD ( 32.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Aug 05, 2023 at 10:28:30AM -0400, Radu Rendec wrote: > On Fri, 2023-08-04 at 18:24 -0700, Ricardo Neri wrote: > > Commit 5944ce092b97 ("arch_topology: Build cacheinfo from primary CPU") > > adds functionality that architectures can use to optionally allocate and > > build cacheinfo early during boot. Commit 6539cffa9495 ("cacheinfo: Add > > arch specific early level initializer") lets secondary CPUs correct (and > > reallocate memory) cacheinfo data if needed. > > = > > If the early build functionality is not used and cacheinfo does not need > > correction, memory for cacheinfo is never allocated. x86 does not use t= he > > early build functionality. Consequently, during the cacheinfo CPU hotpl= ug > > callback, last_level_cache_is_valid() attempts to dereference a NULL > > pointer: > > = > > =A0=A0=A0=A0 BUG: kernel NULL pointer dereference, address: 00000000000= 00100 > > =A0=A0=A0=A0 #PF: supervisor read access in kernel mode > > =A0=A0=A0=A0 #PF: error_code(0x0000) - not present page > > =A0=A0=A0=A0 PGD 0 P4D 0 > > =A0=A0=A0=A0 Oops: 0000 [#1] PREEPMT SMP NOPTI > > =A0=A0=A0=A0 CPU: 0 PID 19 Comm: cpuhp/0 Not tainted 6.4.0-rc2 #1 > > =A0=A0=A0=A0 RIP: 0010: last_level_cache_is_valid+0x95/0xe0a > > = > > Allocate memory for cacheinfo during the cacheinfo CPU hotplug callback= if > > not done earlier. > > = > > Cc: Andreas Herrmann > > Cc: Catalin Marinas > > Cc: Chen Yu > > Cc: Len Brown > > Cc: Radu Rendec > > Cc: Pierre Gondois > > Cc: Pu Wen > > Cc: "Rafael J. Wysocki" > > Cc: Sudeep Holla > > Cc: Srinivas Pandruvada > > Cc: Will Deacon > > Cc: Zhang Rui > > Cc: linux-arm-kernel@lists.infradead.org > > Cc: stable@vger.kernel.org > > Acked-by: Len Brown > > Fixes: 6539cffa9495 ("cacheinfo: Add arch specific early level initiali= zer") > > Signed-off-by: Ricardo Neri > > --- > > The motivation for commit 5944ce092b97 was to prevent a BUG splat in > > PREEMPT_RT kernels during memory allocation. This splat is not observed= on > > x86 because the memory allocation for cacheinfo happens in > > detect_cache_attributes() from the cacheinfo CPU hotplug callback. > > = > > The dereference of a NULL pointer is not observed today because > > cache_leaves(cpu) is zero until after init_cache_level() is called (also > > during the CPU hotplug callback). Patch2 will set it earlier and the NU= LL- > > pointer dereference will be observed. > > --- > > Changes since v2: > > =A0* Introduced this patch. > > = > > Changes since v1: > > =A0* N/A > > --- > > =A0drivers/base/cacheinfo.c | 6 +++++- > > =A01 file changed, 5 insertions(+), 1 deletion(-) > > = > > diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c > > index cbae8be1fe52..461a77ece4b0 100644 > > --- a/drivers/base/cacheinfo.c > > +++ b/drivers/base/cacheinfo.c > > @@ -554,7 +554,11 @@ static inline int init_level_allocate_ci(unsigned = int cpu) > > =A0=A0=A0=A0=A0=A0=A0=A0 */ > > =A0=A0=A0=A0=A0=A0=A0=A0ci_cacheinfo(cpu)->early_ci_levels =3D false; > > =A0 > > -=A0=A0=A0=A0=A0=A0=A0if (cache_leaves(cpu) <=3D early_leaves) > > +=A0=A0=A0=A0=A0=A0=A0/* > > +=A0=A0=A0=A0=A0=A0=A0 * Some architectures (e.g., x86) do not use earl= y initialization. > > +=A0=A0=A0=A0=A0=A0=A0 * Allocate memory now in such case. > > +=A0=A0=A0=A0=A0=A0=A0 */ > > +=A0=A0=A0=A0=A0=A0=A0if (cache_leaves(cpu) <=3D early_leaves && per_cp= u_cacheinfo(cpu)) > > =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0return 0; > > =A0 > > =A0=A0=A0=A0=A0=A0=A0=A0kfree(per_cpu_cacheinfo(cpu)); > = > For this patch only: > = > Reviewed-by: Radu Rendec > = > Thanks for submitting! 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