From: Valentin Caron <valentin.caron@foss.st.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jirislaby@kernel.org>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Amelie Delaunay <amelie.delaunay@foss.st.com>,
<linux-serial@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
Valentin Caron <valentin.caron@foss.st.com>
Subject: [PATCH v2 3/6] serial: stm32: modify parameter and rename stm32_usart_rx_dma_enabled
Date: Tue, 8 Aug 2023 18:19:03 +0200 [thread overview]
Message-ID: <20230808161906.178996-4-valentin.caron@foss.st.com> (raw)
In-Reply-To: <20230808161906.178996-1-valentin.caron@foss.st.com>
Rename stm32_usart_rx_dma_enabled to stm32_usart_rx_dma_started in order
to match with stm32_usart_tx_dma_started.
Modify argument of stm32_usart_rx_dma_started from uart_port structure to
stm32_port structure to match with stm32_usart_tx_dma_started.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
---
drivers/tty/serial/stm32-usart.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a1585aa1ceb0..3471e23bb02f 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -289,9 +289,9 @@ static int stm32_usart_init_rs485(struct uart_port *port,
return uart_get_rs485_mode(port);
}
-static bool stm32_usart_rx_dma_enabled(struct uart_port *port)
+static bool stm32_usart_rx_dma_started(struct stm32_port *stm32_port)
{
- struct stm32_port *stm32_port = to_stm32_port(port);
+ struct uart_port *port = &stm32_port->port;
const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
if (!stm32_port->rx_ch)
@@ -310,7 +310,7 @@ static bool stm32_usart_pending_rx_pio(struct uart_port *port, u32 *sr)
/* Get pending characters in RDR or FIFO */
if (*sr & USART_SR_RXNE) {
/* Get all pending characters from the RDR or the FIFO when using interrupts */
- if (!stm32_usart_rx_dma_enabled(port))
+ if (!stm32_usart_rx_dma_started(stm32_port))
return true;
/* Handle only RX data errors when using DMA */
@@ -455,7 +455,7 @@ static unsigned int stm32_usart_receive_chars(struct uart_port *port, bool force
u32 sr;
unsigned int size = 0;
- if (stm32_usart_rx_dma_enabled(port) || force_dma_flush) {
+ if (stm32_usart_rx_dma_started(stm32_port) || force_dma_flush) {
rx_dma_status = dmaengine_tx_status(stm32_port->rx_ch,
stm32_port->rx_ch->cookie,
&stm32_port->rx_dma_state);
@@ -789,8 +789,8 @@ static irqreturn_t stm32_usart_interrupt(int irq, void *ptr)
* line has been masked by HW and rx data are stacking in FIFO.
*/
if (!stm32_port->throttled) {
- if (((sr & USART_SR_RXNE) && !stm32_usart_rx_dma_enabled(port)) ||
- ((sr & USART_SR_ERR_MASK) && stm32_usart_rx_dma_enabled(port))) {
+ if (((sr & USART_SR_RXNE) && !stm32_usart_rx_dma_started(stm32_port)) ||
+ ((sr & USART_SR_ERR_MASK) && stm32_usart_rx_dma_started(stm32_port))) {
spin_lock(&port->lock);
size = stm32_usart_receive_chars(port, false);
uart_unlock_and_check_sysrq(port);
@@ -806,7 +806,7 @@ static irqreturn_t stm32_usart_interrupt(int irq, void *ptr)
}
/* Receiver timeout irq for DMA RX */
- if (stm32_usart_rx_dma_enabled(port) && !stm32_port->throttled) {
+ if (stm32_usart_rx_dma_started(stm32_port) && !stm32_port->throttled) {
spin_lock(&port->lock);
size = stm32_usart_receive_chars(port, false);
uart_unlock_and_check_sysrq(port);
@@ -906,7 +906,7 @@ static void stm32_usart_throttle(struct uart_port *port)
* Disable DMA request line if enabled, so the RX data gets queued into the FIFO.
* Hardware flow control is triggered when RX FIFO is full.
*/
- if (stm32_usart_rx_dma_enabled(port))
+ if (stm32_usart_rx_dma_started(stm32_port))
stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq);
--
2.25.1
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next prev parent reply other threads:[~2023-08-08 16:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-08 16:19 [PATCH v2 0/6] serial: stm32: improve DMA pause and resume Valentin Caron
2023-08-08 16:19 ` [PATCH v2 1/6] serial: stm32: avoid clearing DMAT bit during transfer Valentin Caron
2023-08-08 16:19 ` [PATCH v2 2/6] serial: stm32: use DMAT as a configuration bit Valentin Caron
2023-08-08 16:19 ` Valentin Caron [this message]
2023-08-08 16:19 ` [PATCH v2 4/6] serial: stm32: group dma pause/resume error handling into single function Valentin Caron
2023-08-08 16:19 ` [PATCH v2 5/6] serial: stm32: replace access to DMAR bit by dmaengine_pause/resume Valentin Caron
2023-08-08 16:19 ` [PATCH v2 6/6] serial: stm32: synchronize RX DMA channel in shutdown Valentin Caron
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