From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB1EAC41513 for ; Wed, 9 Aug 2023 13:50:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Um33QYFpRH+sFMGP+74PrF43GqRlcbEz9jjK49LREAE=; b=KubuQUyHoKzljT qlTKz97IKyxgE2P8u49ndxPWBWSBFq/YvTxu6M+mQ13lIM70WEMp7sK9Dq6Funi0q8BYoBYHgNa1k tyhI6m9mm9x6IQnJOhuI4CWl2XQ7sl5y+K+WXi4+1HGpThNC6jXDT2bL1ELuwiX4tIqCSDfMD7HA1 FQjOZh7rHKyG3J853v2aUAYvqE3Z6vzkQoLevmvxiexV5yFONt9avuZR1uBDbMadQyNMwI2F9ye/a hTY7M/pXrPtR5yHEtuVfCja14gFvJgcsJ+afo1U2OVxvOP9xf230If6Rwu2IXhBkV7nNwDyfpdjnh cQz+3uf4/5ELVyLpKPCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTjZg-0054nc-1t; Wed, 09 Aug 2023 13:50:08 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qTjZe-0054mi-0X for linux-arm-kernel@lists.infradead.org; Wed, 09 Aug 2023 13:50:07 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8714A616BE; Wed, 9 Aug 2023 13:50:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E572C433C8; Wed, 9 Aug 2023 13:50:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691589005; bh=Vfzf3DcTQNARPIgieTdLo0FAmtPjuxVwHbX9fj9y1UI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LAgIavLaAKCZSAOHzytGHHIp2PZc4sqkDzxhiubWoGPybVffCRNJ92r5bt18raD+l WQ2fTGwdrUy8SuMe/vn95QhqhJNBfg7DMDVzpubuFhhgXtQm+OUv65ywezyA3mye1X wbUBkLH/V7L6rQSqZEZa+mj/6ys8AZlO8F+DwQjlpLlNaX4QUxc/rGg3ZbouF5l7lj 7ZYZ5wo5yKaHVfTQIoKYfjUi60Ca43tAisXibrGNrrL/lIMoByxsEonJXjavCyQpEA 8gSoCn01Qr4aPzssj6LWW1o7KzD5BVHArlcpPoECSUnVduYLw6oZL1yboMH8xl08FG g/a3wPquAJVYg== Date: Wed, 9 Aug 2023 14:50:00 +0100 From: Will Deacon To: Michael Shavit Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org Subject: Re: [PATCH v5 5/9] iommu/arm-smmu-v3: Refactor write_ctx_desc Message-ID: <20230809134959.GB4226@willie-the-truck> References: <20230808171446.2187795-1-mshavit@google.com> <20230809011204.v5.5.I219054a6cf538df5bb22f4ada2d9933155d6058c@changeid> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230809011204.v5.5.I219054a6cf538df5bb22f4ada2d9933155d6058c@changeid> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_065006_305629_64CF62D9 X-CRM114-Status: GOOD ( 24.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Aug 09, 2023 at 01:12:01AM +0800, Michael Shavit wrote: > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > index 968559d625c40..e3992a0c16377 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > @@ -37,6 +37,24 @@ struct arm_smmu_bond { > > static DEFINE_MUTEX(sva_lock); > > +static int arm_smmu_write_ctx_desc_devices(struct arm_smmu_domain *smmu_domain, > + int ssid, > + struct arm_smmu_ctx_desc *cd) > +{ > + struct arm_smmu_master *master; > + unsigned long flags; > + int ret; > + > + spin_lock_irqsave(&smmu_domain->devices_lock, flags); > + list_for_each_entry(master, &smmu_domain->devices, domain_head) { > + ret = arm_smmu_write_ctx_desc(master, ssid, cd); > + if (ret) > + break; > + } > + spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); > + return ret; > +} > + > /* > * Check if the CPU ASID is available on the SMMU side. If a private context > * descriptor is using it, try to replace it. > @@ -80,7 +98,7 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) > * be some overlap between use of both ASIDs, until we invalidate the > * TLB. > */ > - arm_smmu_write_ctx_desc(smmu_domain, 0, cd); > + arm_smmu_write_ctx_desc_devices(smmu_domain, 0, cd); > > /* Invalidate TLB entries previously associated with that context */ > arm_smmu_tlb_inv_asid(smmu, asid); > @@ -222,7 +240,7 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) > * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events, > * but disable translation. > */ > - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, &quiet_cd); > + arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, &quiet_cd); > > arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); > arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); > @@ -279,9 +297,11 @@ arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smmu_domain, > goto err_free_cd; > } > > - ret = arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, cd); > - if (ret) > + ret = arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, cd); > + if (ret) { > + arm_smmu_write_ctx_desc_devices(smmu_domain, mm->pasid, NULL); Why is it safe to drop the lock between these two calls? > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index c01023404c26c..34bd7815aeb8e 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -971,14 +971,12 @@ void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid) > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > } > > -static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain, > +static void arm_smmu_sync_cd(struct arm_smmu_master *master, > int ssid, bool leaf) > { > size_t i; > - unsigned long flags; > - struct arm_smmu_master *master; > struct arm_smmu_cmdq_batch cmds; > - struct arm_smmu_device *smmu = smmu_domain->smmu; > + struct arm_smmu_device *smmu = master->smmu; > struct arm_smmu_cmdq_ent cmd = { > .opcode = CMDQ_OP_CFGI_CD, > .cfgi = { > @@ -988,15 +986,10 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain, > }; > > cmds.num = 0; > - > - spin_lock_irqsave(&smmu_domain->devices_lock, flags); Since you're dropping this and relying on the lock being taken higher up callstack, can we add a lockdep assertion that we do actually hold the devices_lock, please? Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel