From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11C57C001E0 for ; Thu, 10 Aug 2023 12:54:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IrfPH9wboTF9Lb2r0xsO4LcsWaVZ11OogqPxIzBfeDc=; b=Oh0m6Hi3KAs5tF 7Y+r+KqjhAFHL5hCR+gB5UKD5+NdUFge2eFuhqSbl0+J4PuHzSIVJaYI+iSTZObcq/f1O4W4ry6x5 9clKxXIQrOZnf4SWFLobM+AuKDzUDqeRbNT5wI+KRd3t/BTs4KLqXxVmsdTFitoo2/ntWUtYqwVhl wwkefMx5dky3OT2eHjAEN9wESA/zfDFuA/SwJVDlJ1R4eQ4qjt2Gni6RAiHt0ziqPOYwnkAy4qsrl 4OzlvaaOjJlZQvNEZndlQ8ICr+J7fKGh8Cds+bHajqyOlV0VBB8xYi6H9uJn6pxxsgkGnLg5KiVvs oR82MDz19+T3UvByaG5Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qU5Aj-007f0T-0n; Thu, 10 Aug 2023 12:53:49 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qU5Ag-007ez8-2U for linux-arm-kernel@lists.infradead.org; Thu, 10 Aug 2023 12:53:48 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37ACrRub048755; Thu, 10 Aug 2023 07:53:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691672007; bh=uYZTDKeU4rsKqk+u8ek7UbQLVm8hR2nUi3uxOCTh2hk=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=kX7GRbrD+5zRm5zUc3Yi0QiZgUVjtXylr+atGu4O2uN0uj3Y03YFgAjKg7gRdPUjN Tp1PbcqNQ62lHkts5PN9B4Qjwijow8KO59kkhAS9kC22YNE9lkngf7CHxuISNH3vLG KVv/cWTCTAtDandZVhcX6zrAx9yNjonEjgLpWyAs= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37ACrRC3129971 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Aug 2023 07:53:27 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 10 Aug 2023 07:53:27 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 10 Aug 2023 07:53:27 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37ACrR3l130327; Thu, 10 Aug 2023 07:53:27 -0500 Date: Thu, 10 Aug 2023 07:53:27 -0500 From: Nishanth Menon To: "Kumar, Udit" CC: Apurva Nandan , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rafael J Wysocki , Daniel Lezcano , Amit Kucheria , Zhang Rui , , , , , Keerthy J Subject: Re: [PATCH 2/3] arm64: dts: ti: k3-j7200: Add the supported frequencies for A72 Message-ID: <20230810125327.pq2fxda7dpv2qf7t@seizing> References: <20230809173905.1844132-1-a-nandan@ti.com> <20230809173905.1844132-3-a-nandan@ti.com> <20230809190943.unpcbrinyn5ppei7@hydrated> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230810_055346_889993_807763BC X-CRM114-Status: GOOD ( 16.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 17:23-20230810, Kumar, Udit wrote: [..] > > > + opp1-750000000 { > > > + opp-hz = /bits/ 64 <750000000>; > > > }; > > > }; > > > -- > > > 2.34.1 > > > > > Are you sure this is correct to enable all OPPs without efuse bit checks? > > > > https://www.ti.com/lit/ds/symlink/dra821u-q1.pdf > > 7.5 Operating Performance Points > > DRA821xC operates only upto 750MHz > > DRA821xE at 1GHz > > DRA821xL upto 1.5GHz and > > DRA821xT upto 2GHz > > Looks, top SKUs is considered here . > > After detecting which SKU we are running (I hope TRM should have this > information- through efuse or some other register) > > I think, we can follow two approaches. Both of these are wrong approaches. > > 1) have OPP table for each SKU and select based SKUs type or This proliferates cpu dtsi to make it hard to manage > > 2) Do run time fixup by u-boot based upon SKU type This wont work: a) in u-boot's falcon boot mode and puts unrelated responsibility to bootloader (u-boot is not the only bootloader in the party here). b) Further, the reason for doing the opp detection in the kernel is due to the severity of consequence of attempting to run a lower rated chip at higher frequency - PoH (Power on Hours) or physical damage can result. c) Finally, in a virtualized environment: TISCI will get DM (Device Manager) to arbitrate between the each of the VM's request, but if the VM's are'nt self sufficient, we will have DM making wrong choices resulting in (b) condition again. This is the reason why drivers/cpufreq/ti-cpufreq.c exists and all SoCs that have OPPs from TI is handled in the kernel itself. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel