From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77345EB64DD for ; Fri, 11 Aug 2023 07:50:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ln+Jey5lffIzfVQ/bcQW/02Wy6TZdT+7YaPsnX/2Ue8=; b=iZ2bgvoQy5naSl eMroJOWxplMO7VAfaFRkel2/rg/adgLDqSKlfyXUe6as8aGa1KUyP+d9dpr++i6exHdDJWnGDgcub IrCfF80DGnqmMgieZJv97cGuysd/BL+fkJlflLBDOOaFhwEC0OcPSyt1lKX/+x5tuc6GsEN0yY0bP Dk5FTfnK4erhEVo0mmDPyeAc9ZyucGk7OeLJuLQxuMZe6zIuPnysXuVjm3zf1cV4C+GfOGaukchPt sEBCNIk4HNJh1d+Kp2iRoQvonM+StlT2WUnrbtaxzNlQCJ7PA4D8xN9Y2Za3W+iq9LHYDmXTpn+1r 4g19hunpvJa92f/K5pWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qUMuY-009mwg-2a; Fri, 11 Aug 2023 07:50:18 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qUMuW-009muh-1d for linux-arm-kernel@lists.infradead.org; Fri, 11 Aug 2023 07:50:18 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37B7o8ik046448; Fri, 11 Aug 2023 02:50:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691740208; bh=G9OWHXsY19lEsHCXBg4q5dQSET0RUIrirgxjNztR6zo=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=r0IUwQ7SyVQc39ZJ6k2ogGmvZ8/jqnrTO3EvuN7TGO65KjgI2Go1vhvYNDffHTGi7 7JD/47W8JpEB46FY9PoZkbuAO0RyOWI1IwWAsRXLvJ4rhkvNuzLPu6WqMiu7mxmznd yO6YrjxyVJycnMQNpviV5ejvkcO7vPGagdAphRWA= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37B7o8Nd128937 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 11 Aug 2023 02:50:08 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 11 Aug 2023 02:50:07 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 11 Aug 2023 02:50:07 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37B7o6Gu003878; Fri, 11 Aug 2023 02:50:07 -0500 Date: Fri, 11 Aug 2023 13:20:06 +0530 From: Dhruva Gole To: Nishanth Menon CC: Stephen Boyd , Conor Dooley , Krzysztof Kozlowski , Rob Herring , Viresh Kumar , "Rafael J. Wysocki" , , , , , Vibhore Vardhan Subject: Re: [PATCH V4 2/2] dt-bindings: cpufreq: Convert ti-cpufreq to json schema Message-ID: <20230811075006.wlx5qq2tkz5zn7ok@dhruva> References: <20230811031458.957624-1-nm@ti.com> <20230811031458.957624-3-nm@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230811031458.957624-3-nm@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230811_005016_623469_28592580 X-CRM114-Status: GOOD ( 19.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Aug 10, 2023 at 22:14:58 -0500, Nishanth Menon wrote: > Move the ti-cpufreq binding over to opp and convert the free text > binding to json-schema. > > Signed-off-by: Nishanth Menon > --- > Changes since V3: > * Rewrote the description of the binding to something more relevant to > current style of documentation. > * Due to the rewrite in description, I have dropped Dhruva's > Reviewed-by. OK > > V3: https://lore.kernel.org/all/20230809023045.1870410-3-nm@ti.com/ > V2: https://lore.kernel.org/all/20230801233341.1416552-3-nm@ti.com > V1: https://lore.kernel.org/all/20230724153911.1376830-6-nm@ti.com/ > > .../bindings/cpufreq/ti-cpufreq.txt | 132 ------------------ > .../opp/operating-points-v2-ti-cpu.yaml | 92 ++++++++++++ > 2 files changed, 92 insertions(+), 132 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt > create mode 100644 Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml > [...] > diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml > new file mode 100644 > index 000000000000..02d1d2c17129 > --- /dev/null > +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml > @@ -0,0 +1,92 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: TI CPU OPP (Operating Performance Points) > + > +description: > + TI SoCs, like those in the AM335x, AM437x, AM57xx, AM62x, and DRA7xx > + families, the CPU frequencies subset and the voltage value of each > + OPP vary based on the silicon variant used. The data sheet sections > + corresponding to "Operating Performance Points" describe the frequency > + and voltage values based on device type and speed bin information > + blown in corresponding eFuse bits as referred to by the Technical > + Reference Manual. > + > + This document extends the operating-points-v2 binding by providing > + the hardware description for the scheme mentioned above. > + [...] Thanks for addressing my comments, Reviewed-by: Dhruva Gole -- Best regards, Dhruva Gole _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel