From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 895D2EB64DD for ; Fri, 11 Aug 2023 16:51:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=faxrX5/xcuuu0b/sNyjIYpu0ztphfc5KHSEh0zZRsM4=; b=MwrioitkuydJzO XNbVm53SlnrILNKb/pViYXt5Jww+749TZKOrVl8kXP4bU7BLTU17S8ggpLipq8sB22V9Zg7CZmr3F TN+tLewBpNhXV8SP9PE6694Ka/JhwI7ydGw1XAk8xhC2KFCu72Eys5FJggE5xiLXtviXQC4yk6N7D bRuO//qzrv7Q21CA4ru02JV/kpclwqKPkTaCVsCtnkv/aGpCMdN4Zzpl0B9b+sGVbt3nk8w5f2kUO DiL8pbdAqGXoYFKKrzWP5Nc59gtLVV49p7mCZBJ63bBUjorjfrMWZfcn76w34882klsGzyUwlfxML PP+/zk0ANyxne6K6pD0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qUVMJ-00B9v0-0K; Fri, 11 Aug 2023 16:51:31 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qUVMG-00B9to-0W for linux-arm-kernel@lists.infradead.org; Fri, 11 Aug 2023 16:51:29 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 53942668EC; Fri, 11 Aug 2023 16:51:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 74C6BC433C8; Fri, 11 Aug 2023 16:51:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691772686; bh=YSX5UobIdU8VrcDfUp1Fm8UQla0lNaAdeT7xjx65AcQ=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=hL4zqPol8Fqt4WWp08foT18yup+VTVYBBmviYvTxvkwrH6xbLzjdAOuyScf9cath8 +HKXyLKcWbKk5CFF77kD2yUQCAezllrfsxLnaL/OXuZNXZv/0sRB3i2o8zs4emaERi 3ML/PX0+k7A2KM79lJXxWS1xG+y++bNeUWCwNZ/ANd2hQS78x2f0Z5UKSXyRYfxwc8 CORmrGc1OnesvNlAg+1SUtc+uDZF9jRC5bXsTych2uXF3ZITDOH/c2AdtNEwP3gs6U smr3E+ppKgggnPIyhktTKVYm/PjcRSdoF+E1Jza2izpCGlW0i/6y06EWUtFiVROjt8 gobNWw3X/6Lig== Date: Fri, 11 Aug 2023 11:51:24 -0500 From: Bjorn Helgaas To: "Havalige, Thippeswamy" Cc: Rob Herring , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "krzysztof.kozlowski@linaro.org" , "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "conor+dt@kernel.org" , "lpieralisi@kernel.org" , "Gogada, Bharat Kumar" , "Simek, Michal" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v3 2/2] PCI: xilinx-nwl: Increase ECAM size to accommodate 256 buses Message-ID: <20230811165124.GA76405@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230811_095128_309060_BDC55729 X-CRM114-Status: GOOD ( 33.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Aug 11, 2023 at 05:07:09AM +0000, Havalige, Thippeswamy wrote: > > -----Original Message----- > > From: Rob Herring > > On Thu, Aug 10, 2023 at 05:50:02PM +0530, Thippeswamy Havalige wrote: > > > Our controller is expecting ECAM size to be programmed by software. By > > > programming "NWL_ECAM_VALUE_DEFAULT 12" controller can access up to > > > 16MB ECAM region which is used to detect 16 buses, so by updating > > > "NWL_ECAM_VALUE_DEFAULT" to 16 so that controller can access up to > > > 256MB ECAM region to detect 256 buses. > > > > What happens when your DT has the smaller size and the kernel configures > > the larger size? Seems like you could have an ABI issue. > > - Here we are enabling hardware to support maximum buses. In this > case kernel can enumerate up to device tree exposed ECAM size. We > will not face any issue. So IIUC, if you have a DT with the smaller size and you boot a kernel that includes this change, nothing will break, but the kernel will only be able to use 16 buses. Conversely, if you have a DT with the larger size and boot a kernel that does not include change, nothing will break, but the kernel will still only be able to use 16 buses. Probably worth capturing this in the commit log somehow, especially the first case. > > > Signed-off-by: Thippeswamy Havalige > > > Signed-off-by: Bharat Kumar Gogada > > > --- > > > changes in v3: > > > - Remove unnecessary period at end of subject line. > > > changes in v2: > > > - Update this changes in a seperate patch. > > > --- > > > drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++---- > > > 1 file changed, 2 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c > > > b/drivers/pci/controller/pcie-xilinx-nwl.c > > > index d8a3a08be1d5..b51501921d3b 100644 > > > --- a/drivers/pci/controller/pcie-xilinx-nwl.c > > > +++ b/drivers/pci/controller/pcie-xilinx-nwl.c > > > @@ -126,7 +126,7 @@ > > > #define E_ECAM_CR_ENABLE BIT(0) > > > #define E_ECAM_SIZE_LOC GENMASK(20, 16) > > > #define E_ECAM_SIZE_SHIFT 16 > > > -#define NWL_ECAM_VALUE_DEFAULT 12 > > > +#define NWL_ECAM_VALUE_DEFAULT 16 > - Agreed, ll fix it in next patch. > > Not really a meaningful name. It doesn't explain what '16' means. > > > > > #define CFG_DMA_REG_BAR GENMASK(2, 0) > > > #define CFG_PCIE_CACHE GENMASK(7, 0) > > > @@ -165,7 +165,6 @@ struct nwl_pcie { > > > u32 ecam_size; > > > int irq_intx; > > > int irq_misc; > > > - u32 ecam_value; > > > struct nwl_msi msi; > > > struct irq_domain *legacy_irq_domain; > > > struct clk *clk; > > > @@ -674,7 +673,7 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) > > > E_ECAM_CR_ENABLE, E_ECAM_CONTROL); > > > > > > nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) | > > > - (pcie->ecam_value << E_ECAM_SIZE_SHIFT), > > > + (NWL_ECAM_VALUE_DEFAULT << > > E_ECAM_SIZE_SHIFT), > > > E_ECAM_CONTROL); > > > > > > nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_ecam_base), > > > @@ -782,7 +781,6 @@ static int nwl_pcie_probe(struct platform_device > > *pdev) > > > pcie = pci_host_bridge_priv(bridge); > > > > > > pcie->dev = dev; > > > - pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT; > > > > > > err = nwl_pcie_parse_dt(pcie, pdev); > > > if (err) { > > > -- > > > 2.17.1 > > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel