From: Apurva Nandan <a-nandan@ti.com>
To: Apurva Nandan <a-nandan@ti.com>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Hari Nagalla <hnagalla@ti.com>, Udit Kumar <u-kumar1@ti.com>
Subject: [PATCH v3 3/5] arm64: dts: ti: k3-j721s2-main: Add C7x remote processsor nodes
Date: Sat, 12 Aug 2023 01:52:50 +0530 [thread overview]
Message-ID: <20230811202252.3586926-4-a-nandan@ti.com> (raw)
In-Reply-To: <20230811202252.3586926-1-a-nandan@ti.com>
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain. The
C71x DSPs are 64 bit machine with fixed and floating point DSP operations.
Similar to the R5F remote cores, the inter-processor communication
between the main A72 cores and these DSP cores is achieved through
shared memory and Mailboxes.
The following firmware names are used by default for these DSP cores,
and can be overridden in a board dts file if desired:
MAIN C71_0 : j721s2-c71_0-fw
MAIN C71_1 : j721s2-c71_1-fw
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index a8e23b5c6fd5..303e9f124b02 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1768,4 +1768,30 @@ main_r5fss1_core1: r5f@5f00000 {
ti,loczrama = <1>;
};
};
+
+ c71_0: dsp@64800000 {
+ compatible = "ti,j721s2-c71-dsp";
+ reg = <0x00 0x64800000 0x00 0x00080000>,
+ <0x00 0x64e00000 0x00 0x0000c000>;
+ reg-names = "l2sram", "l1dram";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <8>;
+ ti,sci-proc-ids = <0x30 0xff>;
+ resets = <&k3_reset 8 1>;
+ firmware-name = "j721s2-c71_0-fw";
+ status = "disabled";
+ };
+
+ c71_1: dsp@65800000 {
+ compatible = "ti,j721s2-c71-dsp";
+ reg = <0x00 0x65800000 0x00 0x00080000>,
+ <0x00 0x65e00000 0x00 0x0000c000>;
+ reg-names = "l2sram", "l1dram";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <11>;
+ ti,sci-proc-ids = <0x31 0xff>;
+ resets = <&k3_reset 11 1>;
+ firmware-name = "j721s2-c71_1-fw";
+ status = "disabled";
+ };
};
--
2.34.1
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next prev parent reply other threads:[~2023-08-11 20:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 20:22 [PATCH v3 0/5] Add R5F and C7x DSP nodes for J721S2 SoC Apurva Nandan
2023-08-11 20:22 ` [PATCH v3 1/5] arm64: dts: ti: k3-j721s2-mcu: Add MCU R5F cluster nodes Apurva Nandan
2023-08-11 20:22 ` [PATCH v3 2/5] arm64: dts: ti: k3-j721s2-main: Add MAIN R5F remote processsor nodes Apurva Nandan
2023-08-11 20:22 ` Apurva Nandan [this message]
2023-08-11 20:22 ` [PATCH v3 4/5] arm64: dts : ti: k3-j721s2-som-p0: Add DDR carveout memory nodes for R5F Apurva Nandan
2023-08-11 20:22 ` [PATCH v3 5/5] arm64: dts : ti: k3-j721s2-som-p0: Add DDR carveout memory nodes for C71x DSPs Apurva Nandan
2023-08-11 20:31 ` [PATCH v3 0/5] Add R5F and C7x DSP nodes for J721S2 SoC Andrew Davis
2023-08-11 21:14 ` Nishanth Menon
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