From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C49FC3DA6F for ; Wed, 23 Aug 2023 17:10:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SbBjb73nYJfJj7eHwT1ddf9Cfedzr0badaYi2kiqFAs=; b=orKFkzXQXjsOho DAa3r+NtBhmpeMFtt6PwS30QBYTFb3eCea6iX7Br03wuD7eiYDtFu0qZ+glR21m+25G/P/VbjdgSS un6fAseCwzDJ4mQ47dGCHH4aB2iI/3btlfwO+b0nDMrERv6gCjQuJlSqAiAnCPnR0teOAWYmR7qTe Lc8ItqnAC6zMHMG0oWO2OI89c2V649T2Zu1qO6Nd7DjTv0EjDsXpT48o5apEykC0enXrEMOXpvMjS bCTQByDpapy6xBfAL6QNe8rW6/f4b7l3iYevsNXT6p+aYeXr6zRHwLGKrj9b1lTOe6RTBinBRVpDT qPxxXmHxiGeY5P+BlYAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qYrNC-001BRK-13; Wed, 23 Aug 2023 17:10:26 +0000 Received: from mgamail.intel.com ([134.134.136.24]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qYrN8-001BQb-2l for linux-arm-kernel@lists.infradead.org; Wed, 23 Aug 2023 17:10:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692810623; x=1724346623; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xrRC0v01qmst+o9CFPIeg2m8CpONvn/tnWf4Ftn+KSE=; b=MTFzHQI496oHJar1cHN6MdibTi58pk3Zetg12xH48BIibQhdwWVtZZDu 2jid3BGgzzVVdiEyPUz6+7xyPO8bXsGZaZyabiYiX4ml2k9DINhUCCGJW P/c243x9hcUFjuMZmiOzuc7admLAWQhf98H6rgDLpztHkYQ1FofvmaLhf OPpGZEpL71yTDQy712eX7/dIWB0ERHCF4uT94bdnEIrWuAwdxEcvxBcI0 02o9TocJq6wNYhNVyutLc432gZKGR0X+i093IA1zD1Ul21DKjhUpP00jC gwQEvuHdyes2sTPG/mGOix0Gc82qKy5t9isiUeXy/GtNTB1xWw9qwLxHc Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="376945467" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="376945467" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2023 10:10:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="806782503" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="806782503" Received: from pglc00067.png.intel.com ([10.221.207.87]) by fmsmga004.fm.intel.com with ESMTP; 23 Aug 2023 10:10:15 -0700 From: Rohan G Thomas To: fancer.lancer@gmail.com Cc: alexandre.torgue@foss.st.com, conor+dt@kernel.org, conor.dooley@microchip.com, davem@davemloft.net, devicetree@vger.kernel.org, edumazet@google.com, joabreu@synopsys.com, krzysztof.kozlowski+dt@linaro.org, kuba@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, pabeni@redhat.com, peppe.cavallaro@st.com, robh+dt@kernel.org, rohan.g.thomas@intel.com Subject: Re: [PATCH net-next v5 1/2] dt-bindings: net: snps,dwmac: Tx queues with coe Date: Thu, 24 Aug 2023 01:10:04 +0800 Message-Id: <20230823171004.6825-1-rohan.g.thomas@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230823_101022_975487_D5E18E8D X-CRM114-Status: GOOD ( 17.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org >On Tue, Aug 22, 2023 at 05:15:25PM -0700, Jakub Kicinski wrote: >> On Sat, 19 Aug 2023 10:31:31 +0800 Rohan G Thomas wrote: >> > + snps,tx-queues-with-coe: >> > + $ref: /schemas/types.yaml#/definitions/uint32 >> > + description: number of TX queues that support TX checksum offloading >> > >> Is it going to be obvious that if not present all queues support >> checksum offload? I think we should document the default. > >This question is debatable: >1. By default the DW xGMAC and DW QoS Eth IP-cores are >synthesized with only the very first Tx queue having Tx COE enabled. >2. If TSO is disabled then the Tx COE can be individually enabled >for each queue available on DW QoS Eth controller and for the very >first N queues on DW xGMAC controller. >3. If TSO is enabled then the Tx COE will be automatically and always >enabled for as many first queues as there are TSO-capable >DMA-channels. >4. At the current state the STMMAC driver assumes that all Tx Queues >support Tx COE. > >The entry 4 can't be changed since we'll risk to catch regressions on >the platforms with no property specified. On the other hand it partly >contradicts to the rest of the entries. I don't know what would be a >correct way to specify the default value in this case. Most likely >just keep the entry 4 and be done with it. > >BTW I just noticed that but the suggested "snps,tx-queues-with-coe" >property semantic will only cover a DW XGMAC-part of the case 2. DW >QoS Eth can be synthesized with Tx COE individually enabled for a >particular queue if TSO is unavailable. Hi Serge, Didn't know about a different IP configuration supported by DW QoS Eth IP. If this is the case, I think we can have a flag 'coe-unsupported' for any TX queue subnode as below. + snps,coe-unsupported: + $ref: /schemas/types.yaml#/definitions/flag + description: + TX checksum offload is unsupported by the TX queue. If TX checksum + offload is requested for a packet to be transmitted through this + TX queue then have a software fallback in the driver for checksum + calculation. If this is okay, I can rework the patch based on this. Covers both DW QoS Eth IP and DW XGMAC IP cases. > >-Serge(y) > >> -- >> pw-bot: cr BR, Rohan _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel