From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: linux-imx@nxp.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Fabio Estevam <festevam@denx.de>
Subject: [PATCH] arm64: imx8-ss-lsio: Add PWM interrupts
Date: Fri, 8 Sep 2023 13:47:35 -0300 [thread overview]
Message-ID: <20230908164735.666655-1-festevam@gmail.com> (raw)
From: Fabio Estevam <festevam@denx.de>
The PWM interrupt is mandatory per imx-pwm.yaml.
Add them.
This also fixes the followig schema warning:
imx8qm-apalis-v1.1-ixora-v1.2.dtb: pwm@5d000000: 'oneOf' conditional failed, one must be fixed:
'interrupts' is a required property
'interrupts-extended' is a required property
from schema $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Fabio Estevam <festevam@denx.de>
---
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index b3987dd45372..49ad3413db94 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -30,6 +30,7 @@ lsio_pwm0: pwm@5d000000 {
assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -42,6 +43,7 @@ lsio_pwm1: pwm@5d010000 {
assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -54,6 +56,7 @@ lsio_pwm2: pwm@5d020000 {
assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -66,6 +69,7 @@ lsio_pwm3: pwm@5d030000 {
assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
--
2.34.1
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next reply other threads:[~2023-09-08 16:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-08 16:47 Fabio Estevam [this message]
2023-09-25 1:57 ` [PATCH] arm64: imx8-ss-lsio: Add PWM interrupts Shawn Guo
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