From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 500A6CA0ECA for ; Tue, 12 Sep 2023 10:52:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=F+TaDUvvA0kcY6aHafWqwx6UtV2rdSowm1pFSHOhZ4U=; b=LacZDzWD+AtrcU UcLbjJieiZSIijVLSTFfIKadgwsOUNSTZCnS3qQqEz0Vzl2OvQuy3MO108aIrSo0XwyISl5Edtx+2 vsC/ErobWhfqPzf0nJN8d3OUcXz7EML/V4ZKAOU50iRi1fvaL/VRYLKDb7mXq9dov6a/rDuxbXl+K ah45FxqCLYbhz62ZErtcKSULYLhRs1TAwIUktYGFPPeTDA5AF13E8Tv6dG1aKYwMCQV4ngqAbMqEY 3i8+5WV4b8wolQzhIS0Lfm/S4BJ2RdMNT4ileT6wk76EIWIeB+m70IRhFTKAu5+/LbvDKAhWLOYx6 NUfEurPa0FC4F3dAPk5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qg0zU-0030H8-2v; Tue, 12 Sep 2023 10:51:32 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qg0zQ-0030D4-22 for linux-arm-kernel@lists.infradead.org; Tue, 12 Sep 2023 10:51:31 +0000 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RlKyS3F5Sz6J7rT; Tue, 12 Sep 2023 18:46:40 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 12 Sep 2023 11:51:17 +0100 Date: Tue, 12 Sep 2023 11:51:16 +0100 From: Jonathan Cameron To: Robin Murphy CC: guojinhui.liam , , , , , Subject: Re: [PATCH] arm64: cpufeature: Expose the real mpidr value to EL0 Message-ID: <20230912115116.000049b0@Huawei.com> In-Reply-To: <759c91b9-856e-a778-0e0a-e52240e5c8ce@arm.com> References: <20230912035209.1687-1-guojinhui.liam@bytedance.com> <759c91b9-856e-a778-0e0a-e52240e5c8ce@arm.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml100006.china.huawei.com (7.191.160.224) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230912_035128_995178_20DD7A0D X-CRM114-Status: GOOD ( 25.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 12 Sep 2023 09:31:43 +0100 Robin Murphy wrote: > On 2023-09-12 04:52, guojinhui.liam wrote: > > In EL0, it can get the register midr's value to distinguish vendor. > > But it won't return real value of the register mpidr by using mrs > > in EL0. The register mpidr's value is useful to obtain the cpu > > topology information. > > ...except there's no guarantee that the MPIDR value is anything other > than a unique identifier. Proper topology information is already exposed > to userspace[1], as described by ACPI PPTT or Devicetree[2]. Userspace > should be using that. > > Not to mention that userspace fundamentally can't guarantee it won't be > migrated at just the wrong point and read the MPIDR of a different CPU > anyway. (This is why the MIDRs and REVIDRs are also reported via sysfs, > such that userspace has a stable and reliable source of information in > case it needs to consider potential errata.) > > Thanks, > Robin. > > [1] https://www.kernel.org/doc/html/latest/admin-guide/cputopology.html > [2] > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/cpu/cpu-topology.txt As a follow up question, is there some information that is missing from current topology description? (there is lots missing but I'm curious as to what might matter for your use case!) Jonathan > > > In some scenarios, the task scheduling in userspace can be > > optimized with CPU Die information. > > > > Signed-off-by: guojinhui.liam > > --- > > arch/arm64/include/asm/sysreg.h | 3 --- > > arch/arm64/kernel/cpufeature.c | 2 +- > > 2 files changed, 1 insertion(+), 4 deletions(-) > > > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > > index 38296579a4fd..1885857c8a22 100644 > > --- a/arch/arm64/include/asm/sysreg.h > > +++ b/arch/arm64/include/asm/sysreg.h > > @@ -901,9 +901,6 @@ > > #define SYS_TFSR_EL1_TF0 (UL(1) << SYS_TFSR_EL1_TF0_SHIFT) > > #define SYS_TFSR_EL1_TF1 (UL(1) << SYS_TFSR_EL1_TF1_SHIFT) > > > > -/* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */ > > -#define SYS_MPIDR_SAFE_VAL (BIT(31)) > > - > > #define TRFCR_ELx_TS_SHIFT 5 > > #define TRFCR_ELx_TS_MASK ((0x3UL) << TRFCR_ELx_TS_SHIFT) > > #define TRFCR_ELx_TS_VIRTUAL ((0x1UL) << TRFCR_ELx_TS_SHIFT) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index b018ae12ff5f..6e18597fdcc3 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -3450,7 +3450,7 @@ static inline int emulate_id_reg(u32 id, u64 *valp) > > *valp = read_cpuid_id(); > > break; > > case SYS_MPIDR_EL1: > > - *valp = SYS_MPIDR_SAFE_VAL; > > + *valp = read_cpuid_mpidr(); > > break; > > case SYS_REVIDR_EL1: > > /* IMPLEMENTATION DEFINED values are emulated with 0 */ > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel