From: Miguel Luis <miguel.luis@oracle.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev
Cc: miguel.luis@oracle.com
Subject: [PATCH 3/3] KVM: arm64: nv: Handle all _EL02 and _EL12 registers
Date: Wed, 13 Sep 2023 18:52:08 +0000 [thread overview]
Message-ID: <20230913185209.32282-4-miguel.luis@oracle.com> (raw)
In-Reply-To: <20230913185209.32282-1-miguel.luis@oracle.com>
Specify both _EL02 and _EL12 system registers.
Signed-off-by: Miguel Luis <miguel.luis@oracle.com>
---
arch/arm64/kvm/emulate-nested.c | 35 +++++++++++++++++++++++++++++----
1 file changed, 31 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
index 9aa1c06abdb7..957afd97e488 100644
--- a/arch/arm64/kvm/emulate-nested.c
+++ b/arch/arm64/kvm/emulate-nested.c
@@ -690,10 +690,37 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {
SR_RANGE_TRAP(sys_reg(3, 4, 14, 0, 3),
sys_reg(3, 4, 14, 5, 2), CGT_HCR_NV),
/* All _EL02, _EL12 registers */
- SR_RANGE_TRAP(sys_reg(3, 5, 0, 0, 0),
- sys_reg(3, 5, 10, 15, 7), CGT_HCR_NV),
- SR_RANGE_TRAP(sys_reg(3, 5, 12, 0, 0),
- sys_reg(3, 5, 14, 15, 7), CGT_HCR_NV),
+ SR_TRAP(SYS_SCTLR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_CPACR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_SCTLR2_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_ZCR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_TRFCR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_SMCR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_TTBR0_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_TTBR1_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_TCR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_TCR2_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_SPSR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_ELR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_AFSR0_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_AFSR1_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_ESR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_TFSR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_FAR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_BRBCR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_PMSCR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_MAIR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_AMAIR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_VBAR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_CONTEXTIDR_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_SCXTNUM_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTKCTL_EL12, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTP_TVAL_EL02, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTP_CTL_EL02, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTP_CVAL_EL02, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTV_TVAL_EL02, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTV_CTL_EL02, CGT_HCR_NV),
+ SR_TRAP(SYS_CNTV_CVAL_EL02, CGT_HCR_NV),
SR_TRAP(OP_AT_S1E2R, CGT_HCR_NV),
SR_TRAP(OP_AT_S1E2W, CGT_HCR_NV),
SR_TRAP(OP_AT_S12E1R, CGT_HCR_NV),
--
2.39.2
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next prev parent reply other threads:[~2023-09-13 18:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 18:52 [PATCH 0/3] Fine grain sysregs allowed to trap for nested virtualization Miguel Luis
2023-09-13 18:52 ` [PATCH 1/3] arm64: Add missing _EL12 encodings Miguel Luis
2023-09-13 18:52 ` [PATCH 2/3] arm64/kvm: Fine grain _EL2 system registers list that affect nested virtualization Miguel Luis
2023-09-18 9:40 ` Marc Zyngier
2023-09-19 14:54 ` Miguel Luis
2023-09-19 16:31 ` Marc Zyngier
2023-09-13 18:52 ` Miguel Luis [this message]
2023-09-18 9:44 ` [PATCH 3/3] KVM: arm64: nv: Handle all _EL02 and _EL12 registers Marc Zyngier
2023-09-18 12:41 ` Miguel Luis
2023-09-18 12:56 ` Marc Zyngier
2023-09-25 11:04 ` Miguel Luis
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