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Mon, 25 Sep 2023 11:05:43 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 25 Sep 2023 11:05:43 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 25 Sep 2023 11:05:43 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 38PG5hQg028417; Mon, 25 Sep 2023 11:05:43 -0500 Date: Mon, 25 Sep 2023 11:05:43 -0500 From: Nishanth Menon To: "J, KEERTHY" CC: , , , , , , , , Subject: Re: [PATCH v4 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the main domain watchdog instances Message-ID: <20230925160543.4q2rjntoxrh27qh6@drivable> References: <20230925081332.15906-1-j-keerthy@ti.com> <20230925081332.15906-6-j-keerthy@ti.com> <20230925131927.f7ff2u2ip3jxejyg@dreadful> <9fef2589-c864-bcb9-be9d-435d6abd470c@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <9fef2589-c864-bcb9-be9d-435d6abd470c@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230925_090551_187458_5BE9F4AD X-CRM114-Status: GOOD ( 18.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 21:03-20230925, J, KEERTHY wrote: > > > On 9/25/2023 6:49 PM, Nishanth Menon wrote: > > On 13:43-20230925, Keerthy wrote: > > > There are totally 2 instances of watchdog module in MCU domain. > > > > > > Signed-off-by: Keerthy > > > --- > > > .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 20 +++++++++++++++++++ > > > 1 file changed, 20 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > > > index a7b5c4cb7d3e..0b7cc277a567 100644 > > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > > > @@ -714,4 +714,24 @@ > > > ti,esm-pins = <63>; > > > bootph-pre-ram; > > > }; > > > + > > > + mcu_watchdog0: watchdog@40600000 { > > > + compatible = "ti,j7-rti-wdt"; > > > + reg = <0x00 0x40600000 0x00 0x100>; > > > + clocks = <&k3_clks 367 1>; > > > + power-domains = <&k3_pds 367 TI_SCI_PD_EXCLUSIVE>; > > > + assigned-clocks = <&k3_clks 367 0>; > > > + assigned-clock-parents = <&k3_clks 367 4>; > > > + status = "disabled"; > > > + }; > > > + > > > + mcu_watchdog1: watchdog@40610000 { > > > + compatible = "ti,j7-rti-wdt"; > > > + reg = <0x00 0x40610000 0x00 0x100>; > > > + clocks = <&k3_clks 368 1>; > > > + power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>; > > > + assigned-clocks = <&k3_clks 368 0>; > > > + assigned-clock-parents = <&k3_clks 368 4>; > > > + status = "disabled"; > > > > Explain in commit message as to why these are disabled. I believe it is > > because this RTI instances are tightly coupled to the micro > > controllers. but that information needs to be documented. > > Sure. I will add that to the commit message. And inline to code for context, please. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel