[RFC PATCH 36/45] iommu/arm-smmu-v3-kvm: Validate device features

Jean-Philippe Brucker
2023-02-01T14:17:05Z

The KVM hypervisor driver supports a small subset of features. Ensure
the implementation is compatible, and disable some unused features.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
.../iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c
index 1e0daf9ea4ac..2cc632f6b256 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c
@@ -23,6 +23,59 @@ static size_t kvm_arm_smmu_cur;
static size_t kvm_arm_smmu_count;
static struct hyp_arm_smmu_v3_device *kvm_arm_smmu_array;

+static bool kvm_arm_smmu_validate_features(struct arm_smmu_device *smmu)
+{
+ unsigned long oas;
+ unsigned int required_features =
+ ARM_SMMU_FEAT_TRANS_S2 |
+ ARM_SMMU_FEAT_TT_LE;
+ unsigned int forbidden_features =
+ ARM_SMMU_FEAT_STALL_FORCE;
+ unsigned int keep_features =
+ ARM_SMMU_FEAT_2_LVL_STRTAB |
+ ARM_SMMU_FEAT_2_LVL_CDTAB |
+ ARM_SMMU_FEAT_TT_LE |
+ ARM_SMMU_FEAT_SEV |
+ ARM_SMMU_FEAT_COHERENCY |
+ ARM_SMMU_FEAT_TRANS_S1 |
+ ARM_SMMU_FEAT_TRANS_S2 |
+ ARM_SMMU_FEAT_VAX |
+ ARM_SMMU_FEAT_RANGE_INV;
+
+ if (smmu->options & ARM_SMMU_OPT_PAGE0_REGS_ONLY) {
+ dev_err(smmu->dev, "unsupported layout\n");
+ return false;
+ }
+
+ if ((smmu->features & required_features) != required_features) {
+ dev_err(smmu->dev, "missing features 0x%x\n",
+ required_features & ~smmu->features);
+ return false;
+ }
+
+ if (smmu->features & forbidden_features) {
+ dev_err(smmu->dev, "features 0x%x forbidden\n",
+ smmu->features & forbidden_features);
+ return false;
+ }
+
+ smmu->features &= keep_features;
+
+ /*
+ * This can be relaxed (although the spec says that OAS "must match
+ * the system physical address size."), but requires some changes. All
+ * table and queue allocations must use GFP_DMA* to ensure the SMMU can
+ * access them.
+ */
+ oas = get_kvm_ipa_limit();
+ if (smmu->oas < oas) {
+ dev_err(smmu->dev, "incompatible address size\n");
+ return false;
+ }
+
+ return true;
+}
+
static int kvm_arm_smmu_probe(struct platform_device *pdev)
{
int ret;
@@ -68,11 +121,15 @@ static int kvm_arm_smmu_probe(struct platform_device *pdev)
if (ret)
return ret;

+ if (!kvm_arm_smmu_validate_features(smmu))
+ return -ENODEV;
+
platform_set_drvdata(pdev, host_smmu);

/* Hypervisor parameters */
hyp_smmu->mmio_addr = ioaddr;
hyp_smmu->mmio_size = size;
+ hyp_smmu->features = smmu->features;
kvm_arm_smmu_cur++;

return 0;
--
2.39.0