From: Joey Gouly <joey.gouly@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, joey.gouly@arm.com, will@kernel.org
Subject: [PATCH v1 2/2] kselftest/arm64: add FEAT_LSE128 to hwcap test
Date: Tue, 3 Oct 2023 13:45:44 +0100 [thread overview]
Message-ID: <20231003124544.858804-3-joey.gouly@arm.com> (raw)
In-Reply-To: <20231003124544.858804-1-joey.gouly@arm.com>
Add test of a 128-bit atomic instruction for FEAT_LSE128.
Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
---
tools/testing/selftests/arm64/abi/hwcap.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index e3d262831d91..dd9a1cdfd294 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -46,6 +46,20 @@ static void atomics_sigill(void)
asm volatile(".inst 0xb82003ff" : : : );
}
+static void lse128_sigill(void)
+{
+ u64 __attribute__ ((aligned (16))) mem[2] = { 10, 20 };
+ register u64 *memp asm ("x0") = mem;
+ register u64 val0 asm ("x1") = 5;
+ register u64 val1 asm ("x2") = 4;
+
+ /* SWPP X1, X2, [X0] */
+ asm volatile(".inst 0x19228001"
+ : "+r" (memp), "+r" (val0), "+r" (val1)
+ :
+ : "cc", "memory");
+}
+
static void crc32_sigill(void)
{
/* CRC32W W0, W0, W1 */
@@ -364,6 +378,13 @@ static const struct hwcap_data {
.sigbus_fn = uscat_sigbus,
.sigbus_reliable = true,
},
+ {
+ .name = "LSE128",
+ .at_hwcap = AT_HWCAP2,
+ .hwcap_bit = HWCAP2_LSE128,
+ .cpuinfo = "lse128",
+ .sigill_fn = lse128_sigill,
+ },
{
.name = "MOPS",
.at_hwcap = AT_HWCAP2,
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-03 12:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-03 12:45 [PATCH v1 0/2] HWCAP for FEAT_LSE128 Joey Gouly
2023-10-03 12:45 ` [PATCH v1 1/2] arm64: add FEAT_LSE128 HWCAP Joey Gouly
2023-10-03 12:45 ` Joey Gouly [this message]
2023-10-09 14:52 ` [PATCH v1 2/2] kselftest/arm64: add FEAT_LSE128 to hwcap test Mark Brown
2023-10-13 18:44 ` [PATCH v1 0/2] HWCAP for FEAT_LSE128 Catalin Marinas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231003124544.858804-3-joey.gouly@arm.com \
--to=joey.gouly@arm.com \
--cc=catalin.marinas@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).