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From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Elliot Berman <quic_eberman@quicinc.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Guru Das Srinagesh <quic_gurus@quicinc.com>,
	Andrew Halaney <ahalaney@redhat.com>,
	Maximilian Luz <luzmaximilian@gmail.com>,
	Alex Elder <elder@linaro.org>,
	Srini Kandagatla <srinivas.kandagatla@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kernel@quicinc.com,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: [PATCH v3 12/15] firmware: qcom: scm: add support for SHM bridge operations
Date: Mon,  9 Oct 2023 17:34:24 +0200	[thread overview]
Message-ID: <20231009153427.20951-13-brgl@bgdev.pl> (raw)
In-Reply-To: <20231009153427.20951-1-brgl@bgdev.pl>

From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

Add low-level primitives for enabling SHM bridge support as well as
creating and destroying SHM bridge pools to qcom-scm.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
 drivers/firmware/qcom/qcom_scm.c       | 60 ++++++++++++++++++++++++++
 drivers/firmware/qcom/qcom_scm.h       |  3 ++
 include/linux/firmware/qcom/qcom_scm.h |  6 +++
 3 files changed, 69 insertions(+)

diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index 318d7d398e5f..839773270a21 100644
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c
@@ -1323,6 +1323,66 @@ bool qcom_scm_lmh_dcvsh_available(void)
 }
 EXPORT_SYMBOL_GPL(qcom_scm_lmh_dcvsh_available);
 
+int qcom_scm_shm_bridge_enable(void)
+{
+	struct qcom_scm_desc desc = {
+		.svc = QCOM_SCM_SVC_MP,
+		.cmd = QCOM_SCM_MP_SHM_BRIDGE_ENABLE,
+		.owner = ARM_SMCCC_OWNER_SIP
+	};
+
+	struct qcom_scm_res res;
+
+	if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_MP,
+					  QCOM_SCM_MP_SHM_BRIDGE_ENABLE))
+		return -EOPNOTSUPP;
+
+	return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0];
+}
+EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable);
+
+int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags,
+			       u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+			       u64 ns_vmids, u64 *handle)
+{
+	struct qcom_scm_desc desc = {
+		.svc = QCOM_SCM_SVC_MP,
+		.cmd = QCOM_SCM_MP_SHM_BRIDGE_CREATE,
+		.owner = ARM_SMCCC_OWNER_SIP,
+		.args[0] = pfn_and_ns_perm_flags,
+		.args[1] = ipfn_and_s_perm_flags,
+		.args[2] = size_and_flags,
+		.args[3] = ns_vmids,
+		.arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL,
+					 QCOM_SCM_VAL, QCOM_SCM_VAL),
+	};
+
+	struct qcom_scm_res res;
+	int ret;
+
+	ret = qcom_scm_call(__scm->dev, &desc, &res);
+
+	if (handle && !ret)
+		*handle = res.result[1];
+
+	return ret ?: res.result[0];
+}
+EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_create);
+
+int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle)
+{
+	struct qcom_scm_desc desc = {
+		.svc = QCOM_SCM_SVC_MP,
+		.cmd = QCOM_SCM_MP_SHM_BRIDGE_DELETE,
+		.owner = ARM_SMCCC_OWNER_SIP,
+		.args[0] = handle,
+		.arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL),
+	};
+
+	return qcom_scm_call(__scm->dev, &desc, NULL);
+}
+EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_delete);
+
 int qcom_scm_lmh_profile_change(u32 profile_id)
 {
 	struct qcom_scm_desc desc = {
diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h
index aa7d06939f8e..cb7273aa0a5e 100644
--- a/drivers/firmware/qcom/qcom_scm.h
+++ b/drivers/firmware/qcom/qcom_scm.h
@@ -116,6 +116,9 @@ struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void);
 #define QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE	0x05
 #define QCOM_SCM_MP_VIDEO_VAR			0x08
 #define QCOM_SCM_MP_ASSIGN			0x16
+#define QCOM_SCM_MP_SHM_BRIDGE_ENABLE		0x1c
+#define QCOM_SCM_MP_SHM_BRIDGE_DELETE		0x1d
+#define QCOM_SCM_MP_SHM_BRIDGE_CREATE		0x1e
 
 #define QCOM_SCM_SVC_OCMEM		0x0f
 #define QCOM_SCM_OCMEM_LOCK_CMD		0x01
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
index ccaf28846054..9b6054813f59 100644
--- a/include/linux/firmware/qcom/qcom_scm.h
+++ b/include/linux/firmware/qcom/qcom_scm.h
@@ -115,6 +115,12 @@ int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
 int qcom_scm_lmh_profile_change(u32 profile_id);
 bool qcom_scm_lmh_dcvsh_available(void);
 
+int qcom_scm_shm_bridge_enable(void);
+int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags,
+			       u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+			       u64 ns_vmids, u64 *handle);
+int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle);
+
 #ifdef CONFIG_QCOM_QSEECOM
 
 int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id);
-- 
2.39.2


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  parent reply	other threads:[~2023-10-09 15:35 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-09 15:34 [PATCH v3 00/15] arm64: qcom: add and enable SHM Bridge support Bartosz Golaszewski
2023-10-09 15:34 ` [PATCH v3 01/15] firmware: qcom: move Qualcomm code into its own directory Bartosz Golaszewski
2023-10-11 20:01   ` Maximilian Luz
2023-10-09 15:34 ` [PATCH v3 02/15] firmware: qcom: scm: add a missing forward declaration for struct device Bartosz Golaszewski
2023-10-10 19:44   ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 03/15] firmware: qcom: scm: remove unneeded 'extern' specifiers Bartosz Golaszewski
2023-10-10 19:45   ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 04/15] firmware: qcom: add a dedicated TrustZone buffer allocator Bartosz Golaszewski
2023-10-09 21:28   ` Andrew Halaney
2023-10-10  6:42     ` Bartosz Golaszewski
2023-10-10  8:26     ` Bartosz Golaszewski
2023-10-10 20:48       ` Andrew Halaney
2023-10-11  7:39         ` Bartosz Golaszewski
2023-10-09 15:34 ` [PATCH v3 05/15] firmware: qcom: scm: enable the TZ mem allocator Bartosz Golaszewski
2023-10-10  9:11   ` kernel test robot
2023-10-09 15:34 ` [PATCH v3 06/15] firmware: qcom: scm: smc: switch to using the SCM allocator Bartosz Golaszewski
2023-10-10 22:12   ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 07/15] firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator Bartosz Golaszewski
2023-10-10 22:19   ` Andrew Halaney
2023-10-11  7:41     ` Bartosz Golaszewski
2023-10-11 13:54       ` Andrew Halaney
2023-10-11 14:33         ` Bartosz Golaszewski
2023-10-11 20:13           ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 08/15] firmware: qcom: scm: make qcom_scm_ice_set_key() " Bartosz Golaszewski
2023-10-10 22:25   ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 09/15] firmware: qcom: scm: make qcom_scm_lmh_dcvsh() " Bartosz Golaszewski
2023-10-10 22:26   ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 10/15] firmware: qcom: scm: make qcom_scm_qseecom_app_get_id() " Bartosz Golaszewski
2023-10-10 22:28   ` Andrew Halaney
2023-10-11 20:09   ` Maximilian Luz
2023-10-09 15:34 ` [PATCH v3 11/15] firmware: qcom: qseecom: convert to using " Bartosz Golaszewski
2023-10-10 22:49   ` Andrew Halaney
2023-10-11  7:44     ` Bartosz Golaszewski
2023-10-11 13:55       ` Andrew Halaney
2023-10-11 14:37         ` Bartosz Golaszewski
2023-10-11 20:47       ` Maximilian Luz
2023-10-11 20:09   ` Maximilian Luz
2023-10-12 23:21   ` kernel test robot
2023-10-09 15:34 ` Bartosz Golaszewski [this message]
2023-10-09 15:34 ` [PATCH v3 13/15] firmware: qcom: tzmem: enable SHM Bridge support Bartosz Golaszewski
2023-10-11 21:14   ` Andrew Halaney
2023-10-11 22:17     ` Andrew Halaney
2023-10-13  8:32       ` Bartosz Golaszewski
2023-10-13 13:30         ` Andrew Halaney
2023-10-13 14:06           ` Bartosz Golaszewski
2023-10-09 15:34 ` [PATCH v3 14/15] firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() Bartosz Golaszewski
2023-10-11 21:19   ` Andrew Halaney
2023-10-09 15:34 ` [PATCH v3 15/15] arm64: defconfig: enable SHM Bridge support for the TZ memory allocator Bartosz Golaszewski
2023-10-11 21:20   ` Andrew Halaney
2023-10-12  8:57     ` Bartosz Golaszewski

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