From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: tharvey@gateworks.com, linux-arm-kernel@lists.infradead.org,
Fabio Estevam <festevam@denx.de>
Subject: [PATCH] arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes
Date: Mon, 30 Oct 2023 15:32:13 -0300 [thread overview]
Message-ID: <20231030183213.615162-1-festevam@gmail.com> (raw)
From: Fabio Estevam <festevam@denx.de>
Several schema warnings are seen when running:
make dtbs_check DT_SCHEMA_FILES=pci-bus.yaml
Fix them.
Signed-off-by: Fabio Estevam <festevam@denx.de>
---
.../dts/freescale/imx8mm-venice-gw72xx.dtsi | 30 ++++++++++++-------
.../dts/freescale/imx8mm-venice-gw73xx.dtsi | 30 ++++++++++++-------
.../dts/freescale/imx8mm-venice-gw7902.dts | 14 +++++----
3 files changed, 47 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
index 3a0a10e835a2..02807c5fc979 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
@@ -152,23 +152,31 @@ &pcie0 {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- pcie@1,0 {
+ pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- pcie@2,3 {
+ pcie@3,0 {
reg = <0x1800 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- eth1: pcie@5,0 {
+ eth1: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
local-mac-address = [00 00 00 00 00 00];
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
index 4f859d0fec69..7830b724ccd8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
@@ -172,23 +172,31 @@ &pcie0 {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- pcie@1,0 {
+ pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- pcie@2,4 {
+ pcie@4,0 {
reg = <0x2000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- eth1: pcie@6,0 {
+ eth1: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
local-mac-address = [00 00 00 00 00 00];
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index 06a394a41d7c..7ef17c2b0e9d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
@@ -635,13 +635,17 @@ &pcie0 {
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- eth1: pcie@1,0 {
+ eth1: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
local-mac-address = [00 00 00 00 00 00];
};
--
2.34.1
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next reply other threads:[~2023-10-30 18:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-30 18:32 Fabio Estevam [this message]
2023-10-30 19:35 ` [PATCH] arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes Tim Harvey
2023-11-27 3:20 ` Shawn Guo
-- strict thread matches above, loose matches on Subject: below --
2023-12-05 18:22 Tim Harvey
2023-12-05 18:57 ` Fabio Estevam
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