From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F556C4332F for ; Mon, 30 Oct 2023 19:23:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SSM1ONWJbyILlO0VJrNCdxST+qgs7RHzdkiQwIf49Pk=; b=h0hL2/QX2HPz/r hkZxYcnpwQqgW1rXJTZYXrNvsANWtnBvKuIu/yPM5A+8618EZ9vIJKUsuNtOROu8mt5gnNAHdKSYa 01o5OAf59o0AD7mPRuYlvWVH/4oQKqwicL2hvSbsi7ZFZbfqkucHC0pef4UptyE0MteoVKqF9eSbk QDVT3yYfJ61XWjvvEcjl/Pb91fCIZ2Vo4aaHS5SEWDrkwv8H9Llz6ub/Y5NvxTBoINVXYA8GgNP+2 RZD/pBNtfbvwmJrBskqj1kLW2RB6kRgYynHa145uaprsAABaNqYxYeLM3lCMaaD2EMPDP1b+hqv9Q OuS+f15+H9Kp/ZDRH/qg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qxXqc-003uwo-12; Mon, 30 Oct 2023 19:22:50 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qxXqX-003us5-1q for linux-arm-kernel@lists.infradead.org; Mon, 30 Oct 2023 19:22:47 +0000 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.200]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4SK3421l21z6K64q; Tue, 31 Oct 2023 03:19:30 +0800 (CST) Received: from localhost (10.48.147.130) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 30 Oct 2023 19:22:30 +0000 Date: Mon, 30 Oct 2023 19:22:27 +0000 From: Jonathan Cameron To: Shuai Xue CC: Robin Murphy , Will Deacon , Bjorn Helgaas , Yicong Yang , , , , , , , , , , Subject: Re: [PATCH v9 3/4] drivers/perf: add DesignWare PCIe PMU driver Message-ID: <20231030192227.000039dc@Huawei.com> In-Reply-To: <3b2f8b0f-ca94-400f-ae13-ac1de84591b1@linux.alibaba.com> References: <20231020134230.53342-1-xueshuai@linux.alibaba.com> <20231020134230.53342-4-xueshuai@linux.alibaba.com> <20231023123202.GA3515@willie-the-truck> <5b695595-d243-4ea5-97bb-f4c74398fc27@linux.alibaba.com> <20231026144428.00005db8@Huawei.com> <8f8a2e42-f6ed-4328-9457-5f986d761224@arm.com> <3b2f8b0f-ca94-400f-ae13-ac1de84591b1@linux.alibaba.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.48.147.130] X-ClientProxiedBy: lhrpeml500003.china.huawei.com (7.191.162.67) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231030_122245_925258_1B385477 X-CRM114-Status: GOOD ( 18.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 27 Oct 2023 20:25:16 +0800 Shuai Xue wrote: > On 2023/10/27 00:52, Robin Murphy wrote: > > On 26/10/2023 2:44 pm, Jonathan Cameron wrote: = > >> On Tue, 24 Oct 2023 17:29:34 +0800 > >> Shuai Xue wrote: > >> = > >>> + Will, Jonathan, Bjorn and Yicong for probe and hotplug handing. > >>> = > ... > >>>>>> + > >>>>>> +=A0=A0=A0 dwc_pcie_pmu_hp_state =3D ret; > >>>>>> + > >>>>>> +=A0=A0=A0 ret =3D platform_driver_register(&dwc_pcie_pmu_driver); > >>>>>> +=A0=A0=A0 if (ret) > >>>>>> +=A0=A0=A0=A0=A0=A0=A0 goto platform_driver_register_err; > >>>>>> + > >>>>>> +=A0=A0=A0 dwc_pcie_pmu_dev =3D platform_device_register_simple( > >>>>>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 "dwc_pcie_pmu", PLA= TFORM_DEVID_NONE, NULL, 0); > >>>>>> +=A0=A0=A0 if (IS_ERR(dwc_pcie_pmu_dev)) { > >>>>>> +=A0=A0=A0=A0=A0=A0=A0 ret =3D PTR_ERR(dwc_pcie_pmu_dev); > >>>>>> +=A0=A0=A0=A0=A0=A0=A0 goto platform_device_register_error; > >>>>>> +=A0=A0=A0 } = > >>>>> > >>>>> I'm a bit confused as to why you're having to create a platform dev= ice > >>>>> for a PCI device -- is this because the main designware driver has = already > >>>>> bound to it? A comment here explaining why you need to do this woul= d be > >>>>> very helpful. In particular, is there any dependency on another dri= ver > >>>>> to make sure that e.g. config space accesses work properly? If so, = we > >>>>> probably need to enforce module load ordering or something like tha= t. = > >>>> > >>>> AFAICS the platform device/driver serve no purpose other than being = a hilariously roundabout way to run the for_each_pci_dev() loop in dwc_pcie= _pmu_probe() upon module init, and to save explicitly freeing the PMU name/= data. Furthermore the devres action for dwc_pcie_pmu_remove_cpuhp_instance(= ) is apparently going for even more style points at module exit by not even= relying on the corresponding .remove callback of the tenuous platform driv= er to undo what its .probe did, but (ab)using the device's devres list to a= void having to keep track of an explicit list of PMU instances at all. = > >>> > >>> You are right. = > >> > >> Also provides a (potential) parent for the PMU devices which is someth= ing > >> we were trying to clean up for existing PMUs (which end up in the > >> wrong directly in sysfs because they typically don't have parents). = > > = > > Surely the relevant PCI device would be an even more appropriate parent= , though, since that's the true topology? > > = > = > I see, I will add its parent. Agreed - I hadn't it in my head that we didn't have a good mapping to a par= ticular PCIe device (based on some similarish hardware where the counters are share= d across multiple RPs) Here I guess it's fine to use the PCI device. Jonathan > = > Thank you. > Best Regards, > Shuai > = _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel