From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 399A9C4332F for ; Thu, 2 Nov 2023 19:38:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=elzbDxhobqfdvC28XlrfGVpHWXffrAmsXMIlb2+I/Q0=; b=j2Y8RGLuxtqh5B Fkj2Qro+SMVE0e6rfRNtVsPrEnxtkWQOxAf3wIvuYeBgg+UbDHQMutLMNtyxYtV18NdGqhboXxJCQ HRBsUsi4gqWmW9s1ewUAi483ytZRZmEiyVzhCaV9FMBJFzow6fGwPuxvnVmltrJvWzErvsFT8+v5u lOy1/yPFpma4j7VOBBVYwz8JWmQHT/b1LeScdQja1pPVGPSYBEEa+rXGToAF2Gr9tBl+Mz0QrObbK 9R5oq28a1/LmnaqOlYFxT7FZsG0z56dQFMNeN9GzChLaEqCgXOv2C4Er7KcU+IcKhL5tnkObesYV8 ibFAZu7c+v8mpQcSsEiw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qydW5-00ABA6-20; Thu, 02 Nov 2023 19:38:09 +0000 Received: from mail-qv1-xf31.google.com ([2607:f8b0:4864:20::f31]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qydW1-00AB6k-2k for linux-arm-kernel@lists.infradead.org; Thu, 02 Nov 2023 19:38:07 +0000 Received: by mail-qv1-xf31.google.com with SMTP id 6a1803df08f44-66fa16092c0so8091836d6.0 for ; Thu, 02 Nov 2023 12:38:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hefring-com.20230601.gappssmtp.com; s=20230601; t=1698953884; x=1699558684; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6aaUx3IM/nYfDKWStA9Ff2X3zBWfKwgpoaBzpBVRw5U=; b=NbKrRTY+IEgmuk2ggnlDy+R0QMdoWS1l8CIXUGU0FP4iRo7wsD3ScBEF/joAuwE14s t6AB8L5Y+LncvKwKpPhRgYW/0jiYHrw8eABLPJYUMlLoyx2GdvteEF4POWoM9xWZenn2 toWbuWf1j1o+TLvUmoM4fpaGKlxMKdVjRoKMwD5iG1H4uoY1vYsRsiWV2yd68A6fm10P HRU+20j06z+xJ2PiF2pA/W2XO0fa0WZCO6LPsl8ctWcZu0N79HGj/CAr8t6NNe+r58nv oN8kSYvuSLOW5qEeFP8VqKQPUzuRAJY4JONoKYNQ5uqwY9lZ3EWBBRuDVYFBSlS3YK2N jqqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698953884; x=1699558684; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6aaUx3IM/nYfDKWStA9Ff2X3zBWfKwgpoaBzpBVRw5U=; b=RUS6uM+8WNPaRCCd/JkyN1n+mVYoL/lILVFeKzcNaJJRXAK5C6u1mGSPa5HuQTObxk VdVvhDKY3zGTb/+y7PDJFDqbj03zxBjMTZWzrgjdj0TuStWoIcz/xregN29t/obdTZwE 7PGdtcbuS4oKy96T2kqlUfW76EMUNa29ZQa4kI5qoolGTDj+9ZhoiSL/2amdTDNg6jFs mVAAZncf9TeuPfGRhxHWYL9kHgaVg/zmvelBvSE44I8DfybQw2ZZeNmg4nJceNt7Anyo ZkuQYqGXDxyPYR5vc5/W+DMvJZk07Dxx0ZmU2j7rEmWRbWhkNkGb17wafzpYhQAkUDQT 4tzg== X-Gm-Message-State: AOJu0Yy88w7RQ4lYC31KF1e2nRo5jwx5r8RUQzOIQHoHjRV6M7++rcCF BCwbHjABeFxMtWToU91lpZDLYg== X-Google-Smtp-Source: AGHT+IGl1n2G2oeUX/4FgvKTLXfhf+P6aEP1OM//x0r4Ln54rPG+Aie8qOEQgGDLVsNuD/9Gag0UxA== X-Received: by 2002:a05:6214:2688:b0:66d:9f40:4792 with SMTP id gm8-20020a056214268800b0066d9f404792mr26366649qvb.26.1698953884213; Thu, 02 Nov 2023 12:38:04 -0700 (PDT) Received: from localhost.localdomain ([50.212.55.89]) by smtp.gmail.com with ESMTPSA id a10-20020a0ce90a000000b0065b260eafd9sm30654qvo.87.2023.11.02.12.38.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 12:38:03 -0700 (PDT) From: Ben Wolsieffer To: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Alain Volmat , Erwan Leray , Fabrice Gasnier , Ben Wolsieffer Subject: [PATCH v2 5/5] ARM: dts: stm32: add SPI support on STM32F746 Date: Thu, 2 Nov 2023 15:37:22 -0400 Message-ID: <20231102193722.3042245-6-ben.wolsieffer@hefring.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231102193722.3042245-1-ben.wolsieffer@hefring.com> References: <20231102193722.3042245-1-ben.wolsieffer@hefring.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231102_123805_906081_3A5E27B2 X-CRM114-Status: GOOD ( 12.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device tree nodes for the STM32F746 SPI controllers. Signed-off-by: Ben Wolsieffer --- arch/arm/boot/dts/st/stm32f746.dtsi | 60 +++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index 53a8e2dec9a4..14ba51f2a13d 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -274,6 +274,26 @@ gcan3: gcan@40003600 { clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; }; + spi2: spi@40003800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40003800 0x400>; + interrupts = <36>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI2)>; + status = "disabled"; + }; + + spi3: spi@40003c00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40003c00 0x400>; + interrupts = <51>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI3)>; + status = "disabled"; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -491,6 +511,26 @@ sdio1: mmc@40012c00 { status = "disabled"; }; + spi1: spi@40013000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40013000 0x400>; + interrupts = <35>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI1)>; + status = "disabled"; + }; + + spi4: spi@40013400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40013400 0x400>; + interrupts = <84>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI4)>; + status = "disabled"; + }; + syscfg: syscon@40013800 { compatible = "st,stm32-syscfg", "syscon"; reg = <0x40013800 0x400>; @@ -554,6 +594,26 @@ pwm { }; }; + spi5: spi@40015000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40015000 0x400>; + interrupts = <85>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI5)>; + status = "disabled"; + }; + + spi6: spi@40015400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40015400 0x400>; + interrupts = <86>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI6)>; + status = "disabled"; + }; + ltdc: display-controller@40016800 { compatible = "st,stm32-ltdc"; reg = <0x40016800 0x200>; -- 2.42.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel