From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE8D5C4332F for ; Fri, 10 Nov 2023 10:17:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QpJkmtUq2vIEu6MKJtZio6DzCDj70CMOP8E1Q+UStjc=; b=V3mtybW0WfbT45 KhSoxBgZwCOXHt/NElVmyMHEm2/bazvXEF4+V768zcxjtfwuGjZRfj2q+o0Z40rOlumxFwwiShL/+ cOPQ7N1P9EaN4VPa3OJgNSOMMQ0Bh8mluDaAz2O1xLf2/sBF2DlwCFnWtmCOvgA0znYDfODY3HWB2 frWrdi+aPYh4YW2AaUwi9Jo682apybvLjQ0Vmu7dJdarUlZhQ1XZfgty4p5fD1FuSFIla3Oku52/g KyRE0sJAoE52DvG50rcc/LaaYdX5q9Ux9+Dnv1Di+38h7vfq8TuYOOcdVQXlM/nQ8ZQaW52WGgNvK 5qN2cR/J0A6pfXMQmp/w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r1OZK-008H7V-0L; Fri, 10 Nov 2023 10:16:54 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r1OZH-008H1K-2A for linux-arm-kernel@lists.infradead.org; Fri, 10 Nov 2023 10:16:53 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 795A8106F; Fri, 10 Nov 2023 02:17:27 -0800 (PST) Received: from bogus (unknown [10.57.41.96]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 72E873F6C4; Fri, 10 Nov 2023 02:16:39 -0800 (PST) Date: Fri, 10 Nov 2023 10:15:07 +0000 From: Sudeep Holla To: Sumit Gupta Cc: rafael@kernel.org, rui.zhang@intel.com, lenb@kernel.org, Sudeep Holla , lpieralisi@kernel.org, guohanjun@huawei.com, linux-acpi@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, treding@nvidia.com, jonathanh@nvidia.com, bbasu@nvidia.com, sanjayc@nvidia.com, ksitaraman@nvidia.com, srikars@nvidia.com, jbrasen@nvidia.com Subject: Re: [Patch v6 2/2] ACPI: processor: reduce CPUFREQ thermal reduction pctg for Tegra241 Message-ID: <20231110101507.GB1505974@bogus> References: <20231109183322.28039-1-sumitg@nvidia.com> <20231109183322.28039-3-sumitg@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231109183322.28039-3-sumitg@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231110_021651_802136_0A14E35A X-CRM114-Status: GOOD ( 24.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Nov 10, 2023 at 12:03:22AM +0530, Sumit Gupta wrote: > From: Srikar Srimath Tirumala > > Current implementation of processor_thermal performs software throttling > in fixed steps of "20%" which can be too coarse for some platforms. > We observed some performance gain after reducing the throttle percentage. > Change the CPUFREQ thermal reduction percentage and maximum thermal steps > to be configurable. Also, update the default values of both for Nvidia > Tegra241 (Grace) SoC. The thermal reduction percentage is reduced to "5%" > and accordingly the maximum number of thermal steps are increased as they > are derived from the reduction percentage. > > Signed-off-by: Srikar Srimath Tirumala > Co-developed-by: Sumit Gupta > Signed-off-by: Sumit Gupta > --- > drivers/acpi/arm64/Makefile | 1 + > drivers/acpi/arm64/thermal_cpufreq.c | 22 +++++++++++++ > drivers/acpi/internal.h | 9 +++++ > drivers/acpi/processor_thermal.c | 49 +++++++++++++++++++++++----- > 4 files changed, 72 insertions(+), 9 deletions(-) > create mode 100644 drivers/acpi/arm64/thermal_cpufreq.c > > diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile > index 143debc1ba4a..726944648c9b 100644 > --- a/drivers/acpi/arm64/Makefile > +++ b/drivers/acpi/arm64/Makefile > @@ -5,3 +5,4 @@ obj-$(CONFIG_ACPI_GTDT) += gtdt.o > obj-$(CONFIG_ACPI_APMT) += apmt.o > obj-$(CONFIG_ARM_AMBA) += amba.o > obj-y += dma.o init.o > +obj-y += thermal_cpufreq.o > diff --git a/drivers/acpi/arm64/thermal_cpufreq.c b/drivers/acpi/arm64/thermal_cpufreq.c > new file mode 100644 > index 000000000000..40d5806ed528 > --- /dev/null > +++ b/drivers/acpi/arm64/thermal_cpufreq.c > @@ -0,0 +1,22 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +#include > + > +#include "../internal.h" > + > +#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY > +#define SMCCC_SOC_ID_T241 0x036b0241 Sorry for missing this earlier. Not sure if the above define needs to be conditional. Even if it has to be, CONFIG_ARM_SMCCC_SOC_ID is more appropriate. > + > +int acpi_arch_thermal_cpufreq_pctg(void) > +{ > + s32 soc_id = arm_smccc_get_soc_id_version(); > + > + /* > + * Check JEP106 code for NVIDIA Tegra241 chip (036b:0241) and > + * reduce the CPUFREQ Thermal reduction percentage to 5%. > + */ > + if (soc_id == SMCCC_SOC_ID_T241) > + return 5; > + > + return 0; > +} > +#endif > diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h > index 866c7c4ed233..ee213a8cddc5 100644 > --- a/drivers/acpi/internal.h > +++ b/drivers/acpi/internal.h > @@ -85,6 +85,15 @@ bool acpi_scan_is_offline(struct acpi_device *adev, bool uevent); > acpi_status acpi_sysfs_table_handler(u32 event, void *table, void *context); > void acpi_scan_table_notify(void); > > +#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY It looks weird to add a such specific ARM config option in generic ACPI code/header. Does it make sense to add some new config this new feature you are adding or just use ARM64 and have CONFIG_HAVE_ARM_SMCCC_DISCOVERY check internally in the arch specific call. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel