From: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
To: <conor@kernel.org>
Cc: <conor+dt@kernel.org>, <devicetree@vger.kernel.org>,
<jisheng.teoh@starfivetech.com>,
<krzysztof.kozlowski+dt@linaro.org>,
<leyfoon.tan@starfivetech.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <mark.rutland@arm.com>,
<peterz@infradead.org>, <robh+dt@kernel.org>,
<tglx@linutronix.de>, <will@kernel.org>
Subject: Re: [PATCH 1/2] perf: starfive: Add StarLink PMU support
Date: Tue, 14 Nov 2023 00:20:47 +0800 [thread overview]
Message-ID: <20231113162047.2213725-1-jisheng.teoh@starfivetech.com> (raw)
In-Reply-To: <20231113-grip-unstamped-7d5cb2e39d3e@squawk>
On Mon, 13 Nov 2023 13:45:00 +0000
Conor Dooley <conor@kernel.org> wrote:
> On Mon, Nov 13, 2023 at 12:22:30PM +0800, Ji Sheng Teoh wrote:
>
> > +config STARFIVE_STARLINK_PMU
> > + depends on SOC_STARFIVE
>
> Please s/SOC/ARCH/ so I have one fewer instance to delete.
Thanks Conor, will change to ARCH_STARFIVE in v2.
>
> > + bool "StarFive StarLink PMU"
> > + help
> > + Provide support for StarLink Performance Monitor Unit.
> > + StarLink Performance Monitor Unit integrates one or
> > more cores with
> > + an L3 memory system. The L3 cache events are added into
> > perf event
> > + subsystem, allowing monitoring of various L3 cache perf
> > events.
>
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next prev parent reply other threads:[~2023-11-13 16:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-13 4:22 [PATCH 0/2] StarFive's Starlink PMU Support Ji Sheng Teoh
2023-11-13 4:22 ` [PATCH 1/2] perf: starfive: Add StarLink PMU support Ji Sheng Teoh
2023-11-13 13:45 ` Conor Dooley
2023-11-13 16:20 ` Ji Sheng Teoh [this message]
2023-11-13 4:22 ` [PATCH 2/2] dt-bindings: perf: starfive: Add StarLink PMU Ji Sheng Teoh
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