From: Rob Herring <robh@kernel.org>
To: Daniel Golle <daniel@makrotopia.org>
Cc: "David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
Sean Wang <sean.wang@mediatek.com>,
Mark Lee <Mark-MC.Lee@mediatek.com>,
Lorenzo Bianconi <lorenzo@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Alexander Couzens <lynxis@fe80.eu>,
Philipp Zabel <p.zabel@pengutronix.de>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
linux-phy@lists.infradead.org
Subject: Re: [RFC PATCH 5/8] dt-bindings: net: pcs: add bindings for MediaTek USXGMII PCS
Date: Tue, 14 Nov 2023 07:56:04 -0600 [thread overview]
Message-ID: <20231114135604.GA1661768-robh@kernel.org> (raw)
In-Reply-To: <2dff6aff7006573d3232ec2ddd93c1792740d4d3.1699565880.git.daniel@makrotopia.org>
On Thu, Nov 09, 2023 at 09:51:47PM +0000, Daniel Golle wrote:
> MediaTek's USXGMII can be found in the MT7988 SoC. We need to access
> it in order to configure and monitor the Ethernet SerDes link in
> USXGMII, 10GBase-R and 5GBase-R mode. By including a wrapped
> legacy 1000Base-X/2500Base-X/Cisco SGMII LynxI PCS as well, those
> interface modes are also available.
>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
> .../bindings/net/pcs/mediatek,usxgmii.yaml | 105 ++++++++++++++++++
> 1 file changed, 105 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/pcs/mediatek,usxgmii.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/pcs/mediatek,usxgmii.yaml b/Documentation/devicetree/bindings/net/pcs/mediatek,usxgmii.yaml
> new file mode 100644
> index 0000000000000..199cf47859e31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pcs/mediatek,usxgmii.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/pcs/mediatek,usxgmii.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek USXGMII PCS
> +
> +maintainers:
> + - Daniel Golle <daniel@makrotopia.org>
> +
> +description:
> + The MediaTek USXGMII PCS provides physical link control and status
> + for USXGMII, 10GBase-R and 5GBase-R links on the SerDes interfaces
> + provided by the PEXTP PHY.
> + In order to also support legacy 2500Base-X, 1000Base-X and Cisco
> + SGMII an existing mediatek,*-sgmiisys LynxI PCS is wrapped to
> + provide those interfaces modes on the same SerDes interfaces shared
> + with the USXGMII PCS.
> +
> +properties:
> + $nodename:
> + pattern: "^pcs@[0-9a-f]+$"
> +
> + compatible:
> + const: mediatek,mt7988-usxgmiisys
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: USXGMII top-level clock
> + - description: SGMII top-level clock
> + - description: SGMII subsystem TX clock
> + - description: SGMII subsystem RX clock
> + - description: XFI PLL clock
> +
> + clock-names:
> + items:
> + - const: usxgmii
> + - const: sgmii_sel
> + - const: sgmii_tx
> + - const: sgmii_rx
> + - const: xfi_pll
> +
> + phys:
> + items:
> + - description: PEXTP SerDes PHY
> +
> + mediatek,sgmiisys:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to the syscon node of the corresponding SGMII LynxI PCS.
> +
> + resets:
> + items:
> + - description: XFI reset
> + - description: SGMII reset
> +
> + reset-names:
> + items:
> + - const: xfi
> + - const: sgmii
> +
> + "#pcs-cells":
There is no such property defined.
Rob
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next prev parent reply other threads:[~2023-11-14 13:56 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-09 21:50 [RFC PATCH 0/8] Add support for 10G Ethernet SerDes on MT7988 Daniel Golle
2023-11-09 21:50 ` [RFC PATCH 1/8] dt-bindings: phy: mediatek,xfi-pextp: add new bindings Daniel Golle
2023-11-09 21:55 ` Andrew Lunn
2023-11-09 23:11 ` Daniel Golle
2023-11-14 13:44 ` Rob Herring
2023-11-10 20:08 ` Rob Herring
2023-11-14 13:43 ` Rob Herring
2023-11-09 21:51 ` [RFC PATCH 2/8] phy: add driver for MediaTek pextp 10GE SerDes PHY Daniel Golle
2023-11-27 13:16 ` Vinod Koul
2023-11-09 21:51 ` [RFC PATCH 3/8] net: pcs: pcs-mtk-lynxi: use 2500Base-X without AN Daniel Golle
2023-11-10 8:54 ` Russell King (Oracle)
2023-11-09 21:51 ` [RFC PATCH 4/8] net: pcs: pcs-mtk-lynxi: allow calling with NULL advertising Daniel Golle
2023-11-09 21:51 ` [RFC PATCH 5/8] dt-bindings: net: pcs: add bindings for MediaTek USXGMII PCS Daniel Golle
2023-11-11 8:13 ` Krzysztof Kozlowski
2023-11-14 13:56 ` Rob Herring [this message]
2023-11-27 15:47 ` Russell King (Oracle)
2023-11-09 21:51 ` [RFC PATCH 6/8] net: pcs: add driver " Daniel Golle
2023-11-27 13:25 ` Philipp Zabel
2023-11-27 15:08 ` Russell King (Oracle)
2023-11-09 21:52 ` [RFC PATCH 7/8] dt-bindings: net: mediatek,net: fix and complete mt7988-eth binding Daniel Golle
2023-11-14 14:07 ` Rob Herring
2023-11-14 17:42 ` Daniel Golle
2023-11-09 21:52 ` [RFC PATCH 8/8] net: ethernet: mtk_eth_soc: add paths and SerDes modes for MT7988 Daniel Golle
2023-11-27 13:27 ` Philipp Zabel
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