From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
To: linux-media@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com
Cc: Hugues Fruchet <hugues.fruchet@foss.st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrzej Pietrasiewicz <andrzej.p@collabora.com>,
Benjamin Gaignard <benjamin.gaignard@collabora.com>,
Daniel Almeida <daniel.almeida@collabora.com>,
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
Hans Verkuil <hverkuil-cisco@xs4all.nl>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Nicolas Dufresne <nicolas.dufresne@collabora.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
kernel@collabora.com
Subject: [RFC 3/6] media: verisilicon: Improve constant's name
Date: Thu, 16 Nov 2023 16:48:13 +0100 [thread overview]
Message-ID: <20231116154816.70959-4-andrzej.p@collabora.com> (raw)
In-Reply-To: <20231116154816.70959-1-andrzej.p@collabora.com>
For VP8 BIT(18) of this register is for enabling the boolean encoder.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
---
drivers/media/platform/verisilicon/hantro_h1_regs.h | 2 +-
drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/verisilicon/hantro_h1_regs.h b/drivers/media/platform/verisilicon/hantro_h1_regs.h
index 7752d1291c0e..c1c66c934a24 100644
--- a/drivers/media/platform/verisilicon/hantro_h1_regs.h
+++ b/drivers/media/platform/verisilicon/hantro_h1_regs.h
@@ -70,7 +70,7 @@
#define H1_REG_ENC_CTRL2_DISABLE_QUARTER_PIXMV BIT(22)
#define H1_REG_ENC_CTRL2_TRANS8X8_MODE_EN BIT(21)
#define H1_REG_ENC_CTRL2_CABAC_INIT_IDC(x) ((x) << 19)
-#define H1_REG_ENC_CTRL2_ENTROPY_CODING_MODE BIT(18)
+#define H1_REG_ENC_CTRL2_VP8_BOOLENC_ENABLE BIT(18)
#define H1_REG_ENC_CTRL2_H264_INTER4X4_MODE BIT(17)
#define H1_REG_ENC_CTRL2_H264_STREAM_MODE BIT(16)
#define H1_REG_ENC_CTRL2_INTRA16X16_MODE(x) ((x))
diff --git a/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c b/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c
index 05aa0dd9c09c..08c5079fbfd0 100644
--- a/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c
+++ b/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c
@@ -1226,7 +1226,7 @@ static void hantro_h1_vp8_enc_set_params(struct hantro_dev *vpu, struct hantro_c
reg = 0;
if (mb_width * mb_height > MAX_MB_COUNT_TO_DISABLE_QUARTER_PIXEL_MV)
reg = H1_REG_ENC_CTRL2_DISABLE_QUARTER_PIXMV;
- reg |= H1_REG_ENC_CTRL2_ENTROPY_CODING_MODE;
+ reg |= H1_REG_ENC_CTRL2_VP8_BOOLENC_ENABLE;
inter_favor = 128 - ctx->vp8_enc.prob_intra;
if (inter_favor >= 0)
--
2.25.1
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next prev parent reply other threads:[~2023-11-16 15:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-16 15:48 [RFC 0/6] H.264 stateless encoder RFC 0/6 Andrzej Pietrasiewicz
2023-11-16 15:48 ` [RFC 1/6] media: verisilicon Correct a typo in H1_REG_ENC_CTRL2_DEBLOCKING_FILTER_MODE Andrzej Pietrasiewicz
2023-11-16 15:50 ` Chen-Yu Tsai
2023-11-16 15:48 ` [RFC 2/6] media: verisilicon: Correct a typo in H1_REG_MAD_CTRL_MAD_THRESHOLD Andrzej Pietrasiewicz
2023-11-16 15:50 ` Chen-Yu Tsai
2023-11-16 15:48 ` Andrzej Pietrasiewicz [this message]
2023-11-17 6:11 ` [RFC 3/6] media: verisilicon: Improve constant's name Chen-Yu Tsai
2023-11-17 8:44 ` Andrzej Pietrasiewicz
2023-11-16 15:48 ` [RFC 4/6] media: verisilicon: Update H1 register definitions Andrzej Pietrasiewicz
2023-11-17 6:56 ` Chen-Yu Tsai
2023-11-17 8:46 ` Andrzej Pietrasiewicz
2023-11-16 15:48 ` [RFC 5/6] media: uapi: Add H.264 stateless encoding uAPI Andrzej Pietrasiewicz
2023-11-16 15:48 ` [RFC 6/6] media: verisilicon: Add H.264 stateless encoder Andrzej Pietrasiewicz
2023-11-18 23:19 ` [RFC 0/6] H.264 stateless encoder RFC 0/6 Adam Ford
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