From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v2 13/13] KVM: arm64: Force guest's HCR_EL2.E2H RES1 when NV1 is not implemented
Date: Mon, 20 Nov 2023 12:37:21 +0000 [thread overview]
Message-ID: <20231120123721.851738-14-maz@kernel.org> (raw)
In-Reply-To: <20231120123721.851738-1-maz@kernel.org>
If NV1 isn't supported on a system, make sure we always evaluate
the guest's HCR_EL2.E2H as RES1, irrespective of what the guest
may have written there.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/kvm_emulate.h | 3 ++-
arch/arm64/kvm/sys_regs.c | 12 +++++++++++-
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 78a550537b67..7b10a44189d0 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -213,7 +213,8 @@ static inline bool vcpu_is_el2(const struct kvm_vcpu *vcpu)
static inline bool __vcpu_el2_e2h_is_set(const struct kvm_cpu_context *ctxt)
{
- return ctxt_sys_reg(ctxt, HCR_EL2) & HCR_E2H;
+ return (cpus_have_final_cap(ARM64_HCR_NV1_RES0) ||
+ (ctxt_sys_reg(ctxt, HCR_EL2) & HCR_E2H));
}
static inline bool vcpu_el2_e2h_is_set(const struct kvm_vcpu *vcpu)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index ff2e66f0bda1..9e1e3da2ed4a 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2022,6 +2022,16 @@ static bool access_spsr(struct kvm_vcpu *vcpu,
return true;
}
+static u64 reset_hcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
+{
+ u64 val = r->val;
+
+ if (cpus_have_final_cap(ARM64_HCR_NV1_RES0))
+ val |= HCR_E2H;
+
+ return __vcpu_sys_reg(vcpu, r->reg) = val;
+}
+
/*
* Architected system registers.
* Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
@@ -2513,7 +2523,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
EL2_REG(VMPIDR_EL2, access_rw, reset_unknown, 0),
EL2_REG(SCTLR_EL2, access_rw, reset_val, SCTLR_EL2_RES1),
EL2_REG(ACTLR_EL2, access_rw, reset_val, 0),
- EL2_REG(HCR_EL2, access_rw, reset_val, 0),
+ EL2_REG(HCR_EL2, access_rw, reset_hcr, 0),
EL2_REG(MDCR_EL2, access_rw, reset_val, 0),
EL2_REG(CPTR_EL2, access_rw, reset_val, CPTR_NVHE_EL2_RES1),
EL2_REG(HSTR_EL2, access_rw, reset_val, 0),
--
2.39.2
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next prev parent reply other threads:[~2023-11-20 12:40 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-20 12:37 [PATCH v2 00/13] arm64: Add support for FEAT_E2H0, or lack thereof Marc Zyngier
2023-11-20 12:37 ` [PATCH v2 01/13] arm64: Add macro to compose a sysreg field value Marc Zyngier
2023-11-20 12:37 ` [PATCH v2 02/13] arm64: cpufeatures: Correctly handle signed values Marc Zyngier
2023-11-22 9:29 ` Suzuki K Poulose
2023-11-22 9:46 ` Marc Zyngier
2023-11-20 12:37 ` [PATCH v2 03/13] arm64: cpufeature: Correctly display signed override values Marc Zyngier
2023-11-22 9:16 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 04/13] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1 Marc Zyngier
2023-11-22 9:15 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 05/13] arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling Marc Zyngier
2023-11-22 9:54 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 06/13] arm64: cpufeature: Detect E2H0 not being implemented Marc Zyngier
2023-11-22 14:04 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 07/13] arm64: cpufeature: Detect HCR_EL2.NV1 being RES0 Marc Zyngier
2023-11-22 14:07 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 08/13] arm64: Treat HCR_EL2.E2H as RES1 when ID_AA64MMFR4_EL1.E2H0 is negative Marc Zyngier
2023-11-22 14:11 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 09/13] arm64: Add override for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-22 14:17 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 10/13] arm64: Add MIDR-based override infrastructure Marc Zyngier
2023-11-22 17:53 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 11/13] arm64: Add MIDR-based overrides for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-22 17:55 ` Suzuki K Poulose
2023-11-20 12:37 ` [PATCH v2 12/13] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests Marc Zyngier
2023-11-22 18:01 ` Suzuki K Poulose
2023-11-20 12:37 ` Marc Zyngier [this message]
2023-11-22 18:06 ` [PATCH v2 13/13] KVM: arm64: Force guest's HCR_EL2.E2H RES1 when NV1 is not implemented Suzuki K Poulose
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