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d="asc'?scan'208";a="179320751" X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 23 Nov 2023 07:49:36 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 23 Nov 2023 07:48:56 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21 via Frontend Transport; Thu, 23 Nov 2023 07:48:48 -0700 Date: Thu, 23 Nov 2023 14:48:20 +0000 From: Conor Dooley To: Yu Chien Peter Lin CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description Message-ID: <20231123-obscurity-copied-7a7bcc66d69d@wendy> References: <20231122121235.827122-1-peterlin@andestech.com> <20231122121235.827122-10-peterlin@andestech.com> MIME-Version: 1.0 In-Reply-To: <20231122121235.827122-10-peterlin@andestech.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231123_064939_434316_3FF61BD5 X-CRM114-Status: GOOD ( 13.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============4638894099581259222==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============4638894099581259222== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="fR4tnML+siyABFnW" Content-Disposition: inline --fR4tnML+siyABFnW Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 22, 2023 at 08:12:31PM +0800, Yu Chien Peter Lin wrote: > Document the ISA string for T-Head performance monitor extension > which provides counter overflow interrupt mechanism. >=20 > Signed-off-by: Yu Chien Peter Lin > --- > Changes v2 -> v3: > - New patch > Changes v3 -> v4: > - No change > --- > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Do= cumentation/devicetree/bindings/riscv/extensions.yaml > index c91ab0e46648..694efaea8fce 100644 > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > @@ -258,5 +258,11 @@ properties: > in commit 2e5236 ("Ztso is now ratified.") of the > riscv-isa-manual. > =20 > + - const: xtheadpmu > + description: > + The T-Head performance monitor extension for counter overflo= w. For more > + details, see the chapter 12 in the Xuantie C906 user manual. > + https://github.com/T-head-Semi/openc906/tree/main/doc I'm pretty sure that I asked on the previous revision for you to identify a specific revision of this document. Cheers, Conor. --fR4tnML+siyABFnW Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZV9mNAAKCRB4tDGHoIJi 0i3IAQCWwY2KygG9PG216qosb6qNvHpfqqlRDK3j837NZ9ZYcwD9F+crFMrFfbDL Nhs4rUikhLgCdhfK3SG8kkfTQRWL7QM= =yQh/ -----END PGP SIGNATURE----- --fR4tnML+siyABFnW-- --===============4638894099581259222== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============4638894099581259222==--