* [PATCH v2 01/12] dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 8:23 ` Krzysztof Kozlowski
2023-11-27 15:28 ` [PATCH v2 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects Konrad Dybcio
` (10 subsequent siblings)
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
The "qcom,dsi-ctrl-6g-qcm2290" has been deprecated in commit 0c0f65c6dd44
("dt-bindings: msm: dsi-controller-main: Add compatible strings for every
current SoC"), but the example hasn't been updated to reflect that.
Fix that.
Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
.../devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
index 5ad155612b6c..d71a8e09a798 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
@@ -56,7 +56,9 @@ patternProperties:
properties:
compatible:
- const: qcom,dsi-ctrl-6g-qcm2290
+ items:
+ - const: qcom,qcm2290-dsi-ctrl
+ - const: qcom,mdss-dsi-ctrl
"^phy@[0-9a-f]+$":
type: object
@@ -136,7 +138,8 @@ examples:
};
dsi@5e94000 {
- compatible = "qcom,dsi-ctrl-6g-qcm2290";
+ compatible = "qcom,qcm2290-dsi-ctrl",
+ "qcom,mdss-dsi-ctrl";
reg = <0x05e94000 0x400>;
reg-names = "dsi_ctrl";
--
2.43.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 01/12] dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat
2023-11-27 15:28 ` [PATCH v2 01/12] dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat Konrad Dybcio
@ 2023-11-28 8:23 ` Krzysztof Kozlowski
0 siblings, 0 replies; 20+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-28 8:23 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Dmitry Baryshkov,
Sean Paul, David Airlie, Daniel Vetter, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Loic Poulain,
Bryan O'Donoghue, Andy Gross, Bjorn Andersson, Georgi Djakov,
Will Deacon, Robin Murphy, Joerg Roedel, Krishna Manikandan,
Robert Marko, Das Srinagesh, cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 16:28, Konrad Dybcio wrote:
> The "qcom,dsi-ctrl-6g-qcm2290" has been deprecated in commit 0c0f65c6dd44
> ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every
> current SoC"), but the example hasn't been updated to reflect that.
>
> Fix that.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 01/12] dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 8:23 ` Krzysztof Kozlowski
2023-11-27 15:28 ` [PATCH v2 03/12] dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance Konrad Dybcio
` (9 subsequent siblings)
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are
other connection paths:
- a path that connects rotator block to the DDR.
- a path that needs to be handled to ensure MDSS register access
functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG
interconnect.
Describe these paths to allow using them in device trees and in the
driver.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Konrad: rework for one vs two MDP paths, update examples]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
.../devicetree/bindings/display/msm/mdss-common.yaml | 18 ++++++++++++++----
.../bindings/display/msm/qcom,qcm2290-mdss.yaml | 14 ++++++++++----
.../bindings/display/msm/qcom,sc7180-mdss.yaml | 14 ++++++++++----
.../bindings/display/msm/qcom,sc7280-mdss.yaml | 14 ++++++++++----
.../bindings/display/msm/qcom,sm6115-mdss.yaml | 10 ++++++++++
.../bindings/display/msm/qcom,sm6125-mdss.yaml | 8 ++++++--
.../bindings/display/msm/qcom,sm6350-mdss.yaml | 8 ++++++--
.../bindings/display/msm/qcom,sm6375-mdss.yaml | 8 ++++++--
.../bindings/display/msm/qcom,sm8450-mdss.yaml | 13 ++++++++-----
9 files changed, 80 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
index f69196e4cc76..c6305a6e0334 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -61,17 +61,27 @@ properties:
ranges: true
+ # This is not a perfect description, but it's impossible to discern and match
+ # the entries like we do with interconnect-names
interconnects:
minItems: 1
items:
- description: Interconnect path from mdp0 (or a single mdp) port to the data bus
- description: Interconnect path from mdp1 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- minItems: 1
- items:
- - const: mdp0-mem
- - const: mdp1-mem
+ oneOf:
+ - minItems: 1
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
+
+ - minItems: 2
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+ - const: cpu-cfg
resets:
items:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
index d71a8e09a798..f0cdb5422688 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
@@ -36,10 +36,14 @@ properties:
maxItems: 2
interconnects:
- maxItems: 1
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- maxItems: 1
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -98,8 +102,10 @@ examples:
interrupt-controller;
#interrupt-cells = <1>;
- interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
+ interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>,
+ <&bimc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
iommus = <&apps_smmu 0x420 0x2>,
<&apps_smmu 0x421 0x0>;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
index 3432a2407caa..7a0555b15ddf 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
@@ -36,10 +36,14 @@ properties:
maxItems: 1
interconnects:
- maxItems: 1
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- maxItems: 1
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -106,8 +110,10 @@ examples:
interrupt-controller;
#interrupt-cells = <1>;
- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
iommus = <&apps_smmu 0x800 0x2>;
ranges;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
index bbb727831fca..2947f27e0585 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
@@ -36,10 +36,14 @@ properties:
maxItems: 1
interconnects:
- maxItems: 1
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- maxItems: 1
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -118,8 +122,10 @@ examples:
interrupt-controller;
#interrupt-cells = <1>;
- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
- interconnect-names = "mdp0-mem";
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_DISPLAY_CFG>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
iommus = <&apps_smmu 0x900 0x402>;
ranges;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
index dde5c2acead5..309de1953c88 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
@@ -29,6 +29,16 @@ properties:
iommus:
maxItems: 2
+ interconnects:
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
+
+ interconnect-names:
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
+
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml
index 671c2c2aa896..3deb9dc81c9c 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml
@@ -35,10 +35,14 @@ properties:
maxItems: 1
interconnects:
- maxItems: 2
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- maxItems: 2
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
index e1dcb453762e..c9ba1fae8042 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
@@ -35,10 +35,14 @@ properties:
maxItems: 1
interconnects:
- maxItems: 2
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- maxItems: 2
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml
index b15c3950f09d..8e8a288d318c 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml
@@ -35,10 +35,14 @@ properties:
maxItems: 1
interconnects:
- maxItems: 2
+ items:
+ - description: Interconnect path from mdp0 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
- maxItems: 2
+ items:
+ - const: mdp0-mem
+ - const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
index 001b26e65301..747a2e9665f4 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
@@ -30,10 +30,10 @@ properties:
maxItems: 1
interconnects:
- maxItems: 2
+ maxItems: 3
interconnect-names:
- maxItems: 2
+ maxItems: 3
patternProperties:
"^display-controller@[0-9a-f]+$":
@@ -91,9 +91,12 @@ examples:
reg = <0x0ae00000 0x1000>;
reg-names = "mdss";
- interconnects = <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>,
- <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>;
- interconnect-names = "mdp0-mem", "mdp1-mem";
+ interconnects = <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>,
+ <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
+ interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
--
2.43.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects
2023-11-27 15:28 ` [PATCH v2 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects Konrad Dybcio
@ 2023-11-28 8:23 ` Krzysztof Kozlowski
0 siblings, 0 replies; 20+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-28 8:23 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Dmitry Baryshkov,
Sean Paul, David Airlie, Daniel Vetter, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Loic Poulain,
Bryan O'Donoghue, Andy Gross, Bjorn Andersson, Georgi Djakov,
Will Deacon, Robin Murphy, Joerg Roedel, Krishna Manikandan,
Robert Marko, Das Srinagesh, cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 16:28, Konrad Dybcio wrote:
> Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are
> other connection paths:
> - a path that connects rotator block to the DDR.
> - a path that needs to be handled to ensure MDSS register access
> functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG
> interconnect.
>
> Describe these paths to allow using them in device trees and in the
> driver.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> [Konrad: rework for one vs two MDP paths, update examples]
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
Thanks, looks good.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 03/12] dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 01/12] dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 04/12] dt-bindings: firmware: qcom,scm: Allow interconnect for everyone Konrad Dybcio
` (8 subsequent siblings)
11 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
QCM2290 has a single BWMONv4 intance for CPU. Document it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
index 7cb8df757477..a88cea732370 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
@@ -25,6 +25,7 @@ properties:
- const: qcom,msm8998-bwmon # BWMON v4
- items:
- enum:
+ - qcom,qcm2290-cpu-bwmon
- qcom,sc7180-cpu-bwmon
- qcom,sc7280-cpu-bwmon
- qcom,sc8280xp-cpu-bwmon
--
2.43.0
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^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 04/12] dt-bindings: firmware: qcom,scm: Allow interconnect for everyone
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (2 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 03/12] dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 05/12] iommu/arm-smmu-qcom: Add QCM2290 DPU compatible Konrad Dybcio
` (7 subsequent siblings)
11 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane.
Allow this property to be present, no matter the SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index 0613a37a851a..f3a87a8426d0 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -178,21 +178,6 @@ allOf:
minItems: 3
maxItems: 3
- # Interconnects
- - if:
- not:
- properties:
- compatible:
- contains:
- enum:
- - qcom,scm-qdu1000
- - qcom,scm-sc8280xp
- - qcom,scm-sm8450
- - qcom,scm-sm8550
- then:
- properties:
- interconnects: false
-
# Interrupts
- if:
not:
--
2.43.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 05/12] iommu/arm-smmu-qcom: Add QCM2290 DPU compatible
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (3 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 04/12] dt-bindings: firmware: qcom,scm: Allow interconnect for everyone Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 13:18 ` Dmitry Baryshkov
2023-11-27 15:28 ` [PATCH v2 06/12] arm64: dts: qcom: sc7180: Add the missing MDSS icc path Konrad Dybcio
` (6 subsequent siblings)
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Add the QCM2290 DPU compatible to clients compatible list, as it also
needs the workarounds.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 549ae4dba3a6..aea5e85b20ff 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -245,6 +245,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
{ .compatible = "qcom,adreno" },
{ .compatible = "qcom,mdp4" },
{ .compatible = "qcom,mdss" },
+ { .compatible = "qcom,qcm2290-mdss" },
{ .compatible = "qcom,sc7180-mdss" },
{ .compatible = "qcom,sc7180-mss-pil" },
{ .compatible = "qcom,sc7280-mdss" },
--
2.43.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 05/12] iommu/arm-smmu-qcom: Add QCM2290 DPU compatible
2023-11-27 15:28 ` [PATCH v2 05/12] iommu/arm-smmu-qcom: Add QCM2290 DPU compatible Konrad Dybcio
@ 2023-11-28 13:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2023-11-28 13:18 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Sean Paul, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 17:28, Konrad Dybcio wrote:
> Add the QCM2290 DPU compatible to clients compatible list, as it also
> needs the workarounds.
Nit: MDSS, not DPU compatible
With that fixed:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 549ae4dba3a6..aea5e85b20ff 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -245,6 +245,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
> { .compatible = "qcom,adreno" },
> { .compatible = "qcom,mdp4" },
> { .compatible = "qcom,mdss" },
> + { .compatible = "qcom,qcm2290-mdss" },
> { .compatible = "qcom,sc7180-mdss" },
> { .compatible = "qcom,sc7180-mss-pil" },
> { .compatible = "qcom,sc7280-mdss" },
>
--
With best wishes
Dmitry
_______________________________________________
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 06/12] arm64: dts: qcom: sc7180: Add the missing MDSS icc path
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (4 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 05/12] iommu/arm-smmu-qcom: Add QCM2290 DPU compatible Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 07/12] arm64: dts: qcom: sc7280: " Konrad Dybcio
` (5 subsequent siblings)
11 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one.
Failing to provide it may result in register accesses failing and that's
never good.
Add the missing path.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 11f353d416b4..9664e42faeb1 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3100,8 +3100,12 @@ mdss: display-subsystem@ae00000 {
interrupt-controller;
#interrupt-cells = <1>;
- interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>;
- interconnect-names = "mdp0-mem";
+ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+ &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
iommus = <&apps_smmu 0x800 0x2>;
--
2.43.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 07/12] arm64: dts: qcom: sc7280: Add the missing MDSS icc path
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (5 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 06/12] arm64: dts: qcom: sc7180: Add the missing MDSS icc path Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 08/12] arm64: dts: qcom: qcm2290: Add display nodes Konrad Dybcio
` (4 subsequent siblings)
11 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one.
Failing to provide it may result in register accesses failing and that's
never good.
Add the missing path.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 04bf85b0399a..41d327b1f1b6 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -15,6 +15,7 @@
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc7280.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -3958,8 +3959,12 @@ mdss: display-subsystem@ae00000 {
interrupt-controller;
#interrupt-cells = <1>;
- interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>;
- interconnect-names = "mdp0-mem";
+ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+ &cnoc2 SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
iommus = <&apps_smmu 0x900 0x402>;
--
2.43.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 08/12] arm64: dts: qcom: qcm2290: Add display nodes
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (6 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 07/12] arm64: dts: qcom: sc7280: " Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 13:17 ` Dmitry Baryshkov
2023-11-27 15:28 ` [PATCH v2 09/12] arm64: dts: qcom: qcm2290: Hook up interconnects Konrad Dybcio
` (3 subsequent siblings)
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Add the required nodes to support display on QCM2290.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/qcm2290.dtsi | 214 ++++++++++++++++++++++++++++++++++
1 file changed, 214 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index d46e591e72b5..a3edc4667cc5 100644
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -5,6 +5,7 @@
* Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain.
*/
+#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/dma/qcom-gpi.h>
@@ -1105,6 +1106,219 @@ usb_dwc3: usb@4e00000 {
};
};
+ mdss: display-subsystem@5e00000 {
+ compatible = "qcom,qcm2290-mdss";
+ reg = <0x0 0x05e00000 0x0 0x1000>;
+ reg-names = "mdss";
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ clocks = <&gcc GCC_DISP_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+ clock-names = "iface",
+ "bus",
+ "core";
+
+ resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
+
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ iommus = <&apps_smmu 0x420 0x2>,
+ <&apps_smmu 0x421 0x0>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ status = "disabled";
+
+ mdp: display-controller@5e01000 {
+ compatible = "qcom,qcm2290-dpu";
+ reg = <0x0 0x05e01000 0x0 0x8f000>,
+ <0x0 0x05eb0000 0x0 0x2008>;
+ reg-names = "mdp",
+ "vbif";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus",
+ "iface",
+ "core",
+ "lut",
+ "vsync";
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmpd QCM2290_VDDCX>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dpu_intf1_out: endpoint {
+ remote-endpoint = <&mdss_dsi0_in>;
+ };
+ };
+ };
+
+ mdp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmpd_opp_min_svs>;
+ };
+
+ opp-192000000 {
+ opp-hz = /bits/ 64 <192000000>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ };
+
+ opp-256000000 {
+ opp-hz = /bits/ 64 <256000000>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+
+ opp-307200000 {
+ opp-hz = /bits/ 64 <307200000>;
+ required-opps = <&rpmpd_opp_svs_plus>;
+ };
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ required-opps = <&rpmpd_opp_nom>;
+ };
+ };
+ };
+
+ mdss_dsi0: dsi@5e94000 {
+ compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl";
+ reg = <0x0 0x05e94000 0x0 0x400>;
+ reg-names = "dsi_ctrl";
+
+ interrupt-parent = <&mdss>;
+ interrupts = <4>;
+
+ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
+ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
+ <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
+ <&dispcc DISP_CC_MDSS_ESC0_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>;
+ clock-names = "byte",
+ "byte_intf",
+ "pixel",
+ "core",
+ "iface",
+ "bus";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+ assigned-clock-parents = <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>;
+
+ operating-points-v2 = <&dsi_opp_table>;
+ power-domains = <&rpmpd QCM2290_VDDCX>;
+ phys = <&mdss_dsi0_phy>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ dsi_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmpd_opp_min_svs>;
+ };
+
+ opp-164000000 {
+ opp-hz = /bits/ 64 <164000000>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ };
+
+ opp-187500000 {
+ opp-hz = /bits/ 64 <187500000>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mdss_dsi0_in: endpoint {
+ remote-endpoint = <&dpu_intf1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dsi0_out: endpoint {
+ };
+ };
+ };
+ };
+
+ mdss_dsi0_phy: phy@5e94400 {
+ compatible = "qcom,dsi-phy-14nm-2290";
+ reg = <0x0 0x05e94400 0x0 0x100>,
+ <0x0 0x05e94500 0x0 0x300>,
+ <0x0 0x05e94800 0x0 0x188>;
+ reg-names = "dsi_phy",
+ "dsi_phy_lane",
+ "dsi_pll";
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "iface",
+ "ref";
+
+ power-domains = <&rpmpd QCM2290_VDDMX>;
+ required-opps = <&rpmpd_opp_nom>;
+
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+ };
+
+ dispcc: clock-controller@5f00000 {
+ compatible = "qcom,qcm2290-dispcc";
+ reg = <0x0 0x05f00000 0x0 0x20000>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
+ <&gcc GCC_DISP_GPLL0_CLK_SRC>,
+ <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
+ <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>;
+ clock-names = "bi_tcxo",
+ "bi_tcxo_ao",
+ "gcc_disp_gpll0_clk_src",
+ "gcc_disp_gpll0_div_clk_src",
+ "dsi0_phy_pll_out_byteclk",
+ "dsi0_phy_pll_out_dsiclk";
+ #power-domain-cells = <1>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
remoteproc_mpss: remoteproc@6080000 {
compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas";
reg = <0x0 0x06080000 0x0 0x100>;
--
2.43.0
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^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 08/12] arm64: dts: qcom: qcm2290: Add display nodes
2023-11-27 15:28 ` [PATCH v2 08/12] arm64: dts: qcom: qcm2290: Add display nodes Konrad Dybcio
@ 2023-11-28 13:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2023-11-28 13:17 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Sean Paul, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 17:28, Konrad Dybcio wrote:
> Add the required nodes to support display on QCM2290.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 214 ++++++++++++++++++++++++++++++++++
> 1 file changed, 214 insertions(+)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 09/12] arm64: dts: qcom: qcm2290: Hook up interconnects
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (7 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 08/12] arm64: dts: qcom: qcm2290: Add display nodes Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 13:17 ` Dmitry Baryshkov
2023-11-27 15:28 ` [PATCH v2 10/12] arm64: dts: qcom: qrb2210-rb1: Set up HDMI Konrad Dybcio
` (2 subsequent siblings)
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Add interconnect provider nodes and hook up interconnects to consumer
devices, including bwmon.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/qcm2290.dtsi | 248 ++++++++++++++++++++++++++++++++++
1 file changed, 248 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index a3edc4667cc5..ce04d0acdede 100644
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -12,6 +12,8 @@
#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interconnect/qcom,qcm2290.h>
+#include <dt-bindings/interconnect/qcom,rpm-icc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
/ {
@@ -151,6 +153,8 @@ scm: scm {
clocks = <&rpmcc RPM_SMD_CE1_CLK>;
clock-names = "core";
#reset-cells = <1>;
+ interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
};
};
@@ -669,6 +673,33 @@ usb_qmpphy: phy@1615000 {
status = "disabled";
};
+ system_noc: interconnect@1880000 {
+ compatible = "qcom,qcm2290-snoc";
+ reg = <0x0 0x01880000 0x0 0x60200>;
+ #interconnect-cells = <2>;
+
+ qup_virt: interconnect-qup {
+ compatible = "qcom,qcm2290-qup-virt";
+ #interconnect-cells = <2>;
+ };
+
+ mmnrt_virt: interconnect-mmnrt {
+ compatible = "qcom,qcm2290-mmnrt-virt";
+ #interconnect-cells = <2>;
+ };
+
+ mmrt_virt: interconnect-mmrt {
+ compatible = "qcom,qcm2290-mmrt-virt";
+ #interconnect-cells = <2>;
+ };
+ };
+
+ config_noc: interconnect@1900000 {
+ compatible = "qcom,qcm2290-cnoc";
+ reg = <0x0 0x01900000 0x0 0x8200>;
+ #interconnect-cells = <2>;
+ };
+
qfprom@1b44000 {
compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";
reg = <0x0 0x01b44000 0x0 0x3000>;
@@ -681,6 +712,60 @@ qusb2_hstx_trim: hstx-trim@25b {
};
};
+ pmu@1b8e300 {
+ compatible = "qcom,qcm2290-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0x0 0x01b8e300 0x0 0x600>;
+ interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+ interconnects = <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG
+ &bimc SLAVE_EBI1 RPM_ACTIVE_TAG>;
+
+ cpu_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-0 {
+ opp-peak-kBps = <(200 * 4 * 1000)>;
+ };
+
+ opp-1 {
+ opp-peak-kBps = <(300 * 4 * 1000)>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <(451 * 4 * 1000)>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <(547 * 4 * 1000)>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <(681 * 4 * 1000)>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <(768 * 4 * 1000)>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <(1017 * 4 * 1000)>;
+ };
+
+ opp-7 {
+ opp-peak-kBps = <(1353 * 4 * 1000)>;
+ };
+
+ opp-8 {
+ opp-peak-kBps = <(1555 * 4 * 1000)>;
+ };
+
+ opp-9 {
+ opp-peak-kBps = <(1804 * 4 * 1000)>;
+ };
+ };
+ };
+
spmi_bus: spmi@1c40000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0 0x01c40000 0x0 0x1100>,
@@ -721,6 +806,12 @@ rng: rng@4453000 {
clock-names = "core";
};
+ bimc: interconnect@4480000 {
+ compatible = "qcom,qcm2290-bimc";
+ reg = <0x0 0x04480000 0x0 0x80000>;
+ #interconnect-cells = <2>;
+ };
+
rpm_msg_ram: sram@45f0000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x0 0x045f0000 0x0 0x7000>;
@@ -756,13 +847,45 @@ sdhc_1: mmc@4744000 {
resets = <&gcc GCC_SDCC1_BCR>;
power-domains = <&rpmpd QCM2290_VDDCX>;
+ operating-points-v2 = <&sdhc1_opp_table>;
iommus = <&apps_smmu 0xc0 0x0>;
+ interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>;
+ interconnect-names = "sdhc-ddr",
+ "cpu-sdhc";
qcom,dll-config = <0x000f642c>;
qcom,ddr-config = <0x80040868>;
bus-width = <8>;
status = "disabled";
+
+ sdhc1_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ opp-peak-kBps = <250000 133320>;
+ opp-avg-kBps = <102400 65000>;
+ };
+
+ opp-192000000 {
+ opp-hz = /bits/ 64 <192000000>;
+ required-opps = <&rpmpd_opp_low_svs>;
+ opp-peak-kBps = <800000 300000>;
+ opp-avg-kBps = <204800 200000>;
+ };
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ required-opps = <&rpmpd_opp_svs_plus>;
+ opp-peak-kBps = <800000 300000>;
+ opp-avg-kBps = <204800 200000>;
+ };
+ };
};
sdhc_2: mmc@4784000 {
@@ -786,6 +909,12 @@ sdhc_2: mmc@4784000 {
power-domains = <&rpmpd QCM2290_VDDCX>;
operating-points-v2 = <&sdhc2_opp_table>;
iommus = <&apps_smmu 0xa0 0x0>;
+ interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_SDCC_2 RPM_ALWAYS_TAG>;
+ interconnect-names = "sdhc-ddr",
+ "cpu-sdhc";
qcom,dll-config = <0x0007642c>;
qcom,ddr-config = <0x80040868>;
@@ -799,11 +928,15 @@ sdhc2_opp_table: opp-table {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmpd_opp_low_svs>;
+ opp-peak-kBps = <250000 133320>;
+ opp-avg-kBps = <261438 150000>;
};
opp-202000000 {
opp-hz = /bits/ 64 <202000000>;
required-opps = <&rpmpd_opp_svs_plus>;
+ opp-peak-kBps = <800000 300000>;
+ opp-avg-kBps = <261438 300000>;
};
};
};
@@ -851,6 +984,15 @@ i2c0: i2c@4a80000 {
dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
<&gpi_dma0 1 0 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config",
+ "qup-memory";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -867,6 +1009,12 @@ spi0: spi@4a80000 {
dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
<&gpi_dma0 1 0 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -880,6 +1028,12 @@ uart0: serial@4a80000 {
clock-names = "se";
pinctrl-0 = <&qup_uart0_default>;
pinctrl-names = "default";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
status = "disabled";
};
@@ -894,6 +1048,15 @@ i2c1: i2c@4a84000 {
dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
<&gpi_dma0 1 1 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config",
+ "qup-memory";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -910,6 +1073,12 @@ spi1: spi@4a84000 {
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
<&gpi_dma0 1 1 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -926,6 +1095,15 @@ i2c2: i2c@4a88000 {
dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
<&gpi_dma0 1 2 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config",
+ "qup-memory";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -942,6 +1120,12 @@ spi2: spi@4a88000 {
dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
<&gpi_dma0 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -958,6 +1142,15 @@ i2c3: i2c@4a8c000 {
dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
<&gpi_dma0 1 3 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config",
+ "qup-memory";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -974,6 +1167,12 @@ spi3: spi@4a8c000 {
dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
<&gpi_dma0 1 3 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -990,6 +1189,15 @@ i2c4: i2c@4a90000 {
dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
<&gpi_dma0 1 4 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config",
+ "qup-memory";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1006,6 +1214,12 @@ spi4: spi@4a90000 {
dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
<&gpi_dma0 1 4 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1019,6 +1233,12 @@ uart4: serial@4a90000 {
clock-names = "se";
pinctrl-0 = <&qup_uart4_default>;
pinctrl-names = "default";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
status = "disabled";
};
@@ -1033,6 +1253,15 @@ i2c5: i2c@4a94000 {
dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
<&gpi_dma0 1 5 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>,
+ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config",
+ "qup-memory";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1049,6 +1278,12 @@ spi5: spi@4a94000 {
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
<&gpi_dma0 1 5 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
+ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
+ interconnect-names = "qup-core",
+ "qup-config";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -1081,6 +1316,13 @@ usb: usb@4ef8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
+ /* TODO: USB<->IPA path */
+ interconnects = <&system_noc MASTER_USB3_0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_USB3 RPM_ALWAYS_TAG>;
+ interconnect-names = "usb-ddr",
+ "apps-usb";
wakeup-source;
#address-cells = <2>;
@@ -1127,6 +1369,12 @@ mdss: display-subsystem@5e00000 {
iommus = <&apps_smmu 0x420 0x2>,
<&apps_smmu 0x421 0x0>;
+ interconnects = <&mmrt_virt MASTER_MDP0 RPM_ALWAYS_TAG
+ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
+ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+ &config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
#address-cells = <2>;
#size-cells = <2>;
--
2.43.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 09/12] arm64: dts: qcom: qcm2290: Hook up interconnects
2023-11-27 15:28 ` [PATCH v2 09/12] arm64: dts: qcom: qcm2290: Hook up interconnects Konrad Dybcio
@ 2023-11-28 13:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2023-11-28 13:17 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Sean Paul, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 17:28, Konrad Dybcio wrote:
> Add interconnect provider nodes and hook up interconnects to consumer
> devices, including bwmon.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 248 ++++++++++++++++++++++++++++++++++
> 1 file changed, 248 insertions(+)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 10/12] arm64: dts: qcom: qrb2210-rb1: Set up HDMI
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (8 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 09/12] arm64: dts: qcom: qcm2290: Hook up interconnects Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 13:16 ` Dmitry Baryshkov
2023-11-27 15:28 ` [PATCH v2 11/12] arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 12/12] arm64: dts: qcom: qrb2210-rb1: add wifi variant property Konrad Dybcio
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Add the required nodes to support display output via the HDMI port.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 86 ++++++++++++++++++++++++++++++++
1 file changed, 86 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
index 94885b9c21c8..ac6584164058 100644
--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
+++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
@@ -40,6 +40,17 @@ key-volume-up {
};
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <<9611_out>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -158,6 +169,68 @@ vph_pwr: regulator-vph-pwr {
};
};
+&gpi_dma0 {
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ lt9611_codec: hdmi-bridge@2b {
+ compatible = "lontium,lt9611uxc";
+ reg = <0x2b>;
+ interrupts-extended = <&tlmm 46 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&tlmm 41 GPIO_ACTIVE_HIGH>;
+
+ vdd-supply = <&vreg_hdmi_out_1p2>;
+ vcc-supply = <<9611_3v3>;
+
+ pinctrl-0 = <<9611_irq_pin <9611_rst_pin>;
+ pinctrl-names = "default";
+ #sound-dai-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lt9611_a: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ lt9611_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&pm2250_l5>;
+ status = "okay";
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <<9611_a>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ status = "okay";
+};
+
&pm2250_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
@@ -377,6 +450,19 @@ &sdhc_2 {
};
&tlmm {
+ lt9611_rst_pin: lt9611-rst-state {
+ pins = "gpio41";
+ function = "gpio";
+ input-disable;
+ output-high;
+ };
+
+ lt9611_irq_pin: lt9611-irq-state {
+ pins = "gpio46";
+ function = "gpio";
+ bias-disable;
+ };
+
sd_det_in_on: sd-det-in-on-state {
pins = "gpio88";
function = "gpio";
--
2.43.0
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^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 10/12] arm64: dts: qcom: qrb2210-rb1: Set up HDMI
2023-11-27 15:28 ` [PATCH v2 10/12] arm64: dts: qcom: qrb2210-rb1: Set up HDMI Konrad Dybcio
@ 2023-11-28 13:16 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2023-11-28 13:16 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Sean Paul, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 17:28, Konrad Dybcio wrote:
> Add the required nodes to support display output via the HDMI port.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 86 ++++++++++++++++++++++++++++++++
> 1 file changed, 86 insertions(+)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 11/12] arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (9 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 10/12] arm64: dts: qcom: qrb2210-rb1: Set up HDMI Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-27 15:28 ` [PATCH v2 12/12] arm64: dts: qcom: qrb2210-rb1: add wifi variant property Konrad Dybcio
11 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
Enable the Microchip mcp2518fd hosted on the SPI5 bus.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
index ac6584164058..ac597eb3fe9d 100644
--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
+++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
@@ -23,6 +23,14 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ clocks {
+ clk40M: can-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <40000000>;
+ #clock-cells = <0>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
@@ -449,6 +457,20 @@ &sdhc_2 {
status = "okay";
};
+&spi5 {
+ status = "okay";
+
+ can@0 {
+ compatible = "microchip,mcp2518fd";
+ reg = <0>;
+ interrupts-extended = <&tlmm 39 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk40M>;
+ spi-max-frequency = <10000000>;
+ vdd-supply = <&vdc_5v>;
+ xceiver-supply = <&vdc_5v>;
+ };
+};
+
&tlmm {
lt9611_rst_pin: lt9611-rst-state {
pins = "gpio41";
--
2.43.0
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^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v2 12/12] arm64: dts: qcom: qrb2210-rb1: add wifi variant property
2023-11-27 15:28 [PATCH v2 00/12] RB1/QCM2290 features Konrad Dybcio
` (10 preceding siblings ...)
2023-11-27 15:28 ` [PATCH v2 11/12] arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller Konrad Dybcio
@ 2023-11-27 15:28 ` Konrad Dybcio
2023-11-28 13:15 ` Dmitry Baryshkov
11 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2023-11-27 15:28 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
David Airlie, Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu,
Konrad Dybcio
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
The RB1 platform doesn't have board-specific board-id programmed, it uses
generic 0xff. Thus add the property with the 'variant' of the
calibration data.
Note: the driver will check for the calibration data for the following
IDs, so existing board-2.bin files will continue to work.
- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120,variant=Thundercomm_RB1'
- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120'
- 'bus=snoc,qmi-board-id=ff'
For the reference, the board is identified by the driver in the
following way:
ath10k_snoc c800000.wifi: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000
ath10k_snoc c800000.wifi: qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1
ath10k_snoc c800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000
ath10k_snoc c800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
ath10k_snoc c800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790
ath10k_snoc c800000.wifi: htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
index ac597eb3fe9d..bd7bcf803654 100644
--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
+++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
@@ -535,6 +535,7 @@ &wifi {
vdd-1.8-xo-supply = <&pm2250_l13>;
vdd-1.3-rfa-supply = <&pm2250_l10>;
vdd-3.3-ch0-supply = <&pm2250_l22>;
+ qcom,ath10k-calibration-variant = "Thundercomm_RB1";
status = "okay";
};
--
2.43.0
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^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2 12/12] arm64: dts: qcom: qrb2210-rb1: add wifi variant property
2023-11-27 15:28 ` [PATCH v2 12/12] arm64: dts: qcom: qrb2210-rb1: add wifi variant property Konrad Dybcio
@ 2023-11-28 13:15 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2023-11-28 13:15 UTC (permalink / raw)
To: Konrad Dybcio, Rob Clark, Abhinav Kumar, Sean Paul, David Airlie,
Daniel Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Loic Poulain, Bryan O'Donoghue, Andy Gross, Bjorn Andersson,
Krzysztof Kozlowski, Georgi Djakov, Will Deacon, Robin Murphy,
Joerg Roedel, Krishna Manikandan, Robert Marko, Das Srinagesh,
cros-qcom-dts-watchers
Cc: Marijn Suijten, Rob Herring, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel, linux-pm, linux-arm-kernel, iommu
On 27/11/2023 17:28, Konrad Dybcio wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> The RB1 platform doesn't have board-specific board-id programmed, it uses
> generic 0xff. Thus add the property with the 'variant' of the
> calibration data.
>
> Note: the driver will check for the calibration data for the following
> IDs, so existing board-2.bin files will continue to work.
>
> - 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120,variant=Thundercomm_RB1'
> - 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120'
> - 'bus=snoc,qmi-board-id=ff'
>
> For the reference, the board is identified by the driver in the
> following way:
>
> ath10k_snoc c800000.wifi: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000
> ath10k_snoc c800000.wifi: qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1
> ath10k_snoc c800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000
> ath10k_snoc c800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
> ath10k_snoc c800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790
> ath10k_snoc c800000.wifi: htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
As you are resending this patch, you should add your S-o-b.
> ---
> arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
> index ac597eb3fe9d..bd7bcf803654 100644
> --- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
> @@ -535,6 +535,7 @@ &wifi {
> vdd-1.8-xo-supply = <&pm2250_l13>;
> vdd-1.3-rfa-supply = <&pm2250_l10>;
> vdd-3.3-ch0-supply = <&pm2250_l22>;
> + qcom,ath10k-calibration-variant = "Thundercomm_RB1";
> status = "okay";
> };
>
>
--
With best wishes
Dmitry
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 20+ messages in thread