* [PATCH 1/6] dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU
2023-11-27 16:20 [PATCH 0/6] SM8450 / SM8550 Adreno Konrad Dybcio
@ 2023-11-27 16:20 ` Konrad Dybcio
2023-11-30 9:06 ` Krzysztof Kozlowski
2023-11-27 16:20 ` [PATCH 2/6] arm64: dts: qcom: sm8450: Add GPU nodes Konrad Dybcio
` (4 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:20 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
SM8450 and SM8550 both use a Qualcomm-modified MMU500 for their GPU.
In both cases, it requires a set of clocks to be enabled. Describe that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
.../devicetree/bindings/iommu/arm,smmu.yaml | 48 +++++++++++++++++++++-
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index aa9e1c0895a5..19dba93a7654 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -89,6 +89,8 @@ properties:
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
+ - qcom,sm8450-smmu-500
+ - qcom,sm8550-smmu-500
- const: qcom,adreno-smmu
- const: qcom,smmu-500
- const: arm,mmu-500
@@ -453,6 +455,50 @@ allOf:
- description: Voter clock required for HLOS SMMU access
- description: Interface clock required for register access
+ - if:
+ properties:
+ compatible:
+ const: qcom,sm8450-smmu-500
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: gmu
+ - const: hub
+ - const: hlos
+ - const: bus
+ - const: iface
+ - const: ahb
+
+ clocks:
+ items:
+ - description: GMU clock
+ - description: GPU HUB clock
+ - description: HLOS vote clock
+ - description: GPU memory bus clock
+ - description: GPU SNoC bus clock
+ - description: GPU AHB clock
+
+ - if:
+ properties:
+ compatible:
+ const: qcom,sm8550-smmu-500
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: hlos
+ - const: bus
+ - const: iface
+ - const: ahb
+
+ clocks:
+ items:
+ - description: HLOS vote clock
+ - description: GPU memory bus clock
+ - description: GPU SNoC bus clock
+ - description: GPU AHB clock
+
# Disallow clocks for all other platforms with specific compatibles
- if:
properties:
@@ -473,8 +519,6 @@ allOf:
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
- qcom,sm8350-smmu-500
- - qcom,sm8450-smmu-500
- - qcom,sm8550-smmu-500
then:
properties:
clock-names: false
--
2.43.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 1/6] dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU
2023-11-27 16:20 ` [PATCH 1/6] dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU Konrad Dybcio
@ 2023-11-30 9:06 ` Krzysztof Kozlowski
0 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-30 9:06 UTC (permalink / raw)
To: Konrad Dybcio, Will Deacon, Robin Murphy, Joerg Roedel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Andy Gross,
Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm
On 27/11/2023 17:20, Konrad Dybcio wrote:
> SM8450 and SM8550 both use a Qualcomm-modified MMU500 for their GPU.
> In both cases, it requires a set of clocks to be enabled. Describe that.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/6] arm64: dts: qcom: sm8450: Add GPU nodes
2023-11-27 16:20 [PATCH 0/6] SM8450 / SM8550 Adreno Konrad Dybcio
2023-11-27 16:20 ` [PATCH 1/6] dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU Konrad Dybcio
@ 2023-11-27 16:20 ` Konrad Dybcio
2023-11-30 9:53 ` Neil Armstrong
2023-11-27 16:20 ` [PATCH 3/6] arm64: dts: qcom: sm8550: " Konrad Dybcio
` (3 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:20 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
Add the required nodes to support the A730 GPU.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 202 +++++++++++++++++++++++++++++++++++
1 file changed, 202 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index bde9c1093384..e9664672c160 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sm8450-camcc.h>
#include <dt-bindings/clock/qcom,sm8450-dispcc.h>
+#include <dt-bindings/clock/qcom,sm8450-gpucc.h>
#include <dt-bindings/clock/qcom,sm8450-videocc.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/firmware/qcom,scm.h>
@@ -18,6 +19,7 @@
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,sm8450.h>
+#include <dt-bindings/reset/qcom,sm8450-gpucc.h>
#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
@@ -2019,6 +2021,206 @@ tcsr: syscon@1fc0000 {
reg = <0x0 0x1fc0000 0x0 0x30000>;
};
+ gpu: gpu@3d00000 {
+ compatible = "qcom,adreno-730.1", "qcom,adreno";
+ reg = <0x0 0x03d00000 0x0 0x40000>,
+ <0x0 0x03d9e000 0x0 0x1000>,
+ <0x0 0x03d61000 0x0 0x800>;
+ reg-names = "kgsl_3d0_reg_memory",
+ "cx_mem",
+ "cx_dbgc";
+
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+
+ iommus = <&adreno_smmu 0 0x400>,
+ <&adreno_smmu 1 0x400>;
+
+ operating-points-v2 = <&gpu_opp_table>;
+
+ qcom,gmu = <&gmu>;
+
+ status = "disabled";
+
+ zap-shader {
+ memory-region = <&gpu_micro_code_mem>;
+ };
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-818000000 {
+ opp-hz = /bits/ 64 <818000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+ };
+
+ opp-791000000 {
+ opp-hz = /bits/ 64 <791000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+ };
+
+ opp-734000000 {
+ opp-hz = /bits/ 64 <734000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+ };
+
+ opp-640000000 {
+ opp-hz = /bits/ 64 <640000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+ };
+
+ opp-599000000 {
+ opp-hz = /bits/ 64 <599000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ };
+
+ opp-545000000 {
+ opp-hz = /bits/ 64 <545000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
+ };
+
+ opp-492000000 {
+ opp-hz = /bits/ 64 <492000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ };
+
+ opp-421000000 {
+ opp-hz = /bits/ 64 <421000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
+ };
+
+ opp-350000000 {
+ opp-hz = /bits/ 64 <350000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ };
+
+ opp-317000000 {
+ opp-hz = /bits/ 64 <317000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ };
+
+ opp-285000000 {
+ opp-hz = /bits/ 64 <285000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
+ };
+
+ opp-220000000 {
+ opp-hz = /bits/ 64 <220000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
+ };
+ };
+ };
+
+ gmu: gmu@3d6a000 {
+ compatible = "qcom,adreno-gmu-730.1", "qcom,adreno-gmu";
+ reg = <0x0 0x03d6a000 0x0 0x35000>,
+ <0x0 0x03d50000 0x0 0x10000>,
+ <0x0 0x0b290000 0x0 0x10000>;
+ reg-names = "gmu", "rscc", "gmu_pdc";
+
+ interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hfi", "gmu";
+
+ clocks = <&gpucc GPU_CC_AHB_CLK>,
+ <&gpucc GPU_CC_CX_GMU_CLK>,
+ <&gpucc GPU_CC_CXO_CLK>,
+ <&gcc GCC_DDRSS_GPU_AXI_CLK>,
+ <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+ <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+ <&gpucc GPU_CC_DEMET_CLK>;
+ clock-names = "ahb",
+ "gmu",
+ "cxo",
+ "axi",
+ "memnoc",
+ "hub",
+ "demet";
+
+ power-domains = <&gpucc GPU_CX_GDSC>,
+ <&gpucc GPU_GX_GDSC>;
+ power-domain-names = "cx",
+ "gx";
+
+ iommus = <&adreno_smmu 5 0x400>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ operating-points-v2 = <&gmu_opp_table>;
+
+ gmu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ };
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ };
+ };
+ };
+
+ gpucc: clock-controller@3d90000 {
+ compatible = "qcom,sm8450-gpucc";
+ reg = <0x0 0x03d90000 0x0 0xa000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_GPU_GPLL0_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
+ adreno_smmu: iommu@3da0000 {
+ compatible = "qcom,sm8450-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
+ reg = <0x0 0x03da0000 0x0 0x40000>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 700 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
+ <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+ <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
+ <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+ <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
+ <&gpucc GPU_CC_AHB_CLK>;
+ clock-names = "gmu",
+ "hub",
+ "hlos",
+ "bus",
+ "iface",
+ "ahb";
+ power-domains = <&gpucc GPU_CX_GDSC>;
+ dma-coherent;
+ };
+
usb_1_hsphy: phy@88e3000 {
compatible = "qcom,sm8450-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
--
2.43.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 2/6] arm64: dts: qcom: sm8450: Add GPU nodes
2023-11-27 16:20 ` [PATCH 2/6] arm64: dts: qcom: sm8450: Add GPU nodes Konrad Dybcio
@ 2023-11-30 9:53 ` Neil Armstrong
0 siblings, 0 replies; 14+ messages in thread
From: Neil Armstrong @ 2023-11-30 9:53 UTC (permalink / raw)
To: Konrad Dybcio, Will Deacon, Robin Murphy, Joerg Roedel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Andy Gross,
Bjorn Andersson
Cc: Marijn Suijten, Dmitry Baryshkov, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-arm-msm
On 27/11/2023 17:20, Konrad Dybcio wrote:
> Add the required nodes to support the A730 GPU.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 202 +++++++++++++++++++++++++++++++++++
> 1 file changed, 202 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index bde9c1093384..e9664672c160 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
<snip>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 3/6] arm64: dts: qcom: sm8550: Add GPU nodes
2023-11-27 16:20 [PATCH 0/6] SM8450 / SM8550 Adreno Konrad Dybcio
2023-11-27 16:20 ` [PATCH 1/6] dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU Konrad Dybcio
2023-11-27 16:20 ` [PATCH 2/6] arm64: dts: qcom: sm8450: Add GPU nodes Konrad Dybcio
@ 2023-11-27 16:20 ` Konrad Dybcio
2023-11-27 16:21 ` Konrad Dybcio
2023-11-27 16:20 ` [PATCH 4/6] arm64: dts: qcom: sm8550-qrd: Enable the A740 GPU Konrad Dybcio
` (2 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:20 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
Add the required nodes to support the A740 GPU.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 166 +++++++++++++++++++++++++++++++++++
1 file changed, 166 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 7bafb3d88d69..8f6641c58b3b 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2841,6 +2841,172 @@ dispcc: clock-controller@af00000 {
#power-domain-cells = <1>;
};
+ gpu: gpu@3d00000 {
+ compatible = "qcom,adreno-740.1", "qcom,adreno";
+ reg = <0x0 0x03d00000 0x0 0x40000>,
+ <0x0 0x03d9e000 0x0 0x1000>,
+ <0x0 0x03d61000 0x0 0x800>;
+ reg-names = "kgsl_3d0_reg_memory",
+ "cx_mem",
+ "cx_dbgc";
+
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+
+ iommus = <&adreno_smmu 0 0x0>,
+ <&adreno_smmu 1 0x0>;
+
+ operating-points-v2 = <&gpu_opp_table>;
+
+ qcom,gmu = <&gmu>;
+
+ status = "disabled";
+
+ zap-shader {
+ memory-region = <&gpu_micro_code_mem>;
+ };
+
+ /* Speedbin needs more work on A740+, keep only lower freqs */
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-680000000 {
+ opp-hz = /bits/ 64 <680000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ };
+
+ opp-615000000 {
+ opp-hz = /bits/ 64 <615000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
+ };
+
+ opp-550000000 {
+ opp-hz = /bits/ 64 <550000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ };
+
+ opp-475000000 {
+ opp-hz = /bits/ 64 <475000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
+ };
+
+ opp-401000000 {
+ opp-hz = /bits/ 64 <401000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ };
+
+ opp-348000000 {
+ opp-hz = /bits/ 64 <348000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
+ };
+
+ opp-295000000 {
+ opp-hz = /bits/ 64 <295000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
+ };
+
+ opp-220000000 {
+ opp-hz = /bits/ 64 <220000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
+ };
+ };
+ };
+
+ gmu: gmu@3d6a000 {
+ compatible = "qcom,adreno-gmu-740.1", "qcom,adreno-gmu";
+ reg = <0x0 0x03d6a000 0x0 0x35000>,
+ <0x0 0x03d50000 0x0 0x10000>,
+ <0x0 0x0b280000 0x0 0x10000>;
+ reg-names = "gmu", "rscc", "gmu_pdc";
+
+ interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hfi", "gmu";
+
+ clocks = <&gpucc GPU_CC_AHB_CLK>,
+ <&gpucc GPU_CC_CX_GMU_CLK>,
+ <&gpucc GPU_CC_CXO_CLK>,
+ <&gcc GCC_DDRSS_GPU_AXI_CLK>,
+ <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+ <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+ <&gpucc GPU_CC_DEMET_CLK>;
+ clock-names = "ahb",
+ "gmu",
+ "cxo",
+ "axi",
+ "memnoc",
+ "hub",
+ "demet";
+
+ power-domains = <&gpucc GPU_CC_CX_GDSC>,
+ <&gpucc GPU_CC_GX_GDSC>;
+ power-domain-names = "cx",
+ "gx";
+
+ iommus = <&adreno_smmu 5 0x0>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ operating-points-v2 = <&gmu_opp_table>;
+
+ gmu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ };
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ };
+ };
+ };
+
+ adreno_smmu: iommu@3da0000 {
+ compatible = "qcom,sm8550-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
+ reg = <0x0 0x03da0000 0x0 0x40000>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
+ <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+ <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
+ <&gpucc GPU_CC_AHB_CLK>;
+ clock-names = "hlos",
+ "bus",
+ "iface",
+ "ahb";
+ power-domains = <&gpucc GPU_CC_CX_GDSC>;
+ dma-coherent;
+ };
+
usb_1_hsphy: phy@88e3000 {
compatible = "qcom,sm8550-snps-eusb2-phy";
reg = <0x0 0x088e3000 0x0 0x154>;
--
2.43.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 3/6] arm64: dts: qcom: sm8550: Add GPU nodes
2023-11-27 16:20 ` [PATCH 3/6] arm64: dts: qcom: sm8550: " Konrad Dybcio
@ 2023-11-27 16:21 ` Konrad Dybcio
2023-12-03 4:09 ` Bjorn Andersson
0 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:21 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm
On 27.11.2023 17:20, Konrad Dybcio wrote:
> Add the required nodes to support the A740 GPU.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 166 +++++++++++++++++++++++++++++++++++
> 1 file changed, 166 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 7bafb3d88d69..8f6641c58b3b 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -2841,6 +2841,172 @@ dispcc: clock-controller@af00000 {
> #power-domain-cells = <1>;
> };
>
> + gpu: gpu@3d00000 {
> + compatible = "qcom,adreno-740.1", "qcom,adreno";
The milisecond I pressed "send" I realized this is not the correct revision
of this patch.. The compatible needs to change.
Konrad
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 3/6] arm64: dts: qcom: sm8550: Add GPU nodes
2023-11-27 16:21 ` Konrad Dybcio
@ 2023-12-03 4:09 ` Bjorn Andersson
0 siblings, 0 replies; 14+ messages in thread
From: Bjorn Andersson @ 2023-12-03 4:09 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Marijn Suijten,
Neil Armstrong, Dmitry Baryshkov, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-arm-msm
On Mon, Nov 27, 2023 at 05:21:30PM +0100, Konrad Dybcio wrote:
> On 27.11.2023 17:20, Konrad Dybcio wrote:
> > Add the required nodes to support the A740 GPU.
> >
> > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> > ---
> > arch/arm64/boot/dts/qcom/sm8550.dtsi | 166 +++++++++++++++++++++++++++++++++++
> > 1 file changed, 166 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> > index 7bafb3d88d69..8f6641c58b3b 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> > @@ -2841,6 +2841,172 @@ dispcc: clock-controller@af00000 {
> > #power-domain-cells = <1>;
> > };
> >
> > + gpu: gpu@3d00000 {
> > + compatible = "qcom,adreno-740.1", "qcom,adreno";
> The milisecond I pressed "send" I realized this is not the correct revision
> of this patch.. The compatible needs to change.
>
I could have corrected it while applying the patch if you only included
the revision here...
Looking forward to v2.
Regards,
Bjorn
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 4/6] arm64: dts: qcom: sm8550-qrd: Enable the A740 GPU
2023-11-27 16:20 [PATCH 0/6] SM8450 / SM8550 Adreno Konrad Dybcio
` (2 preceding siblings ...)
2023-11-27 16:20 ` [PATCH 3/6] arm64: dts: qcom: sm8550: " Konrad Dybcio
@ 2023-11-27 16:20 ` Konrad Dybcio
2023-11-30 9:53 ` Neil Armstrong
2023-11-27 16:20 ` [PATCH 5/6] arm64: dts: qcom: sm8550-mtp: " Konrad Dybcio
2023-11-27 16:20 ` [PATCH 6/6] arm64: dts: qcom: sm8450-hdk: Enable the A730 GPU Konrad Dybcio
5 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:20 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
Enable the GPU and provide a path for the ZAP blob.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index eef811def39b..9fe51d308675 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -596,6 +596,14 @@ &gcc {
<&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
};
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ firmware-name = "qcom/sm8550/a740_zap.mbn";
+ };
+};
+
&lpass_tlmm {
spkr_1_sd_n_active: spkr-1-sd-n-active-state {
pins = "gpio17";
--
2.43.0
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 4/6] arm64: dts: qcom: sm8550-qrd: Enable the A740 GPU
2023-11-27 16:20 ` [PATCH 4/6] arm64: dts: qcom: sm8550-qrd: Enable the A740 GPU Konrad Dybcio
@ 2023-11-30 9:53 ` Neil Armstrong
0 siblings, 0 replies; 14+ messages in thread
From: Neil Armstrong @ 2023-11-30 9:53 UTC (permalink / raw)
To: Konrad Dybcio, Will Deacon, Robin Murphy, Joerg Roedel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Andy Gross,
Bjorn Andersson
Cc: Marijn Suijten, Dmitry Baryshkov, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-arm-msm
On 27/11/2023 17:20, Konrad Dybcio wrote:
> Enable the GPU and provide a path for the ZAP blob.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> index eef811def39b..9fe51d308675 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> @@ -596,6 +596,14 @@ &gcc {
> <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
> };
>
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + firmware-name = "qcom/sm8550/a740_zap.mbn";
> + };
> +};
> +
> &lpass_tlmm {
> spkr_1_sd_n_active: spkr-1-sd-n-active-state {
> pins = "gpio17";
>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 5/6] arm64: dts: qcom: sm8550-mtp: Enable the A740 GPU
2023-11-27 16:20 [PATCH 0/6] SM8450 / SM8550 Adreno Konrad Dybcio
` (3 preceding siblings ...)
2023-11-27 16:20 ` [PATCH 4/6] arm64: dts: qcom: sm8550-qrd: Enable the A740 GPU Konrad Dybcio
@ 2023-11-27 16:20 ` Konrad Dybcio
2023-11-30 9:53 ` Neil Armstrong
2023-11-27 16:20 ` [PATCH 6/6] arm64: dts: qcom: sm8450-hdk: Enable the A730 GPU Konrad Dybcio
5 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:20 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
Enable the GPU and provide a path for the ZAP blob.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 9a70875028b7..52244e9bfdee 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -512,6 +512,14 @@ vreg_l3g_1p2: ldo3 {
};
};
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ firmware-name = "qcom/sm8550/a740_zap.mbn";
+ };
+};
+
&i2c_master_hub_0 {
status = "okay";
};
--
2.43.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 5/6] arm64: dts: qcom: sm8550-mtp: Enable the A740 GPU
2023-11-27 16:20 ` [PATCH 5/6] arm64: dts: qcom: sm8550-mtp: " Konrad Dybcio
@ 2023-11-30 9:53 ` Neil Armstrong
0 siblings, 0 replies; 14+ messages in thread
From: Neil Armstrong @ 2023-11-30 9:53 UTC (permalink / raw)
To: Konrad Dybcio, Will Deacon, Robin Murphy, Joerg Roedel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Andy Gross,
Bjorn Andersson
Cc: Marijn Suijten, Dmitry Baryshkov, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-arm-msm
On 27/11/2023 17:20, Konrad Dybcio wrote:
> Enable the GPU and provide a path for the ZAP blob.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> index 9a70875028b7..52244e9bfdee 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> @@ -512,6 +512,14 @@ vreg_l3g_1p2: ldo3 {
> };
> };
>
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + firmware-name = "qcom/sm8550/a740_zap.mbn";
> + };
> +};
> +
> &i2c_master_hub_0 {
> status = "okay";
> };
>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 6/6] arm64: dts: qcom: sm8450-hdk: Enable the A730 GPU
2023-11-27 16:20 [PATCH 0/6] SM8450 / SM8550 Adreno Konrad Dybcio
` (4 preceding siblings ...)
2023-11-27 16:20 ` [PATCH 5/6] arm64: dts: qcom: sm8550-mtp: " Konrad Dybcio
@ 2023-11-27 16:20 ` Konrad Dybcio
2023-11-30 9:54 ` Neil Armstrong
5 siblings, 1 reply; 14+ messages in thread
From: Konrad Dybcio @ 2023-11-27 16:20 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Andy Gross, Bjorn Andersson
Cc: Marijn Suijten, Neil Armstrong, Dmitry Baryshkov,
linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
Enable the GPU and provide a path for the ZAP blob.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 20153d08edde..a20d5d76af35 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -580,6 +580,14 @@ &dispcc {
status = "okay";
};
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ firmware-name = "qcom/sm8450/a730_zap.mbn";
+ };
+};
+
&i2c9 {
clock-frequency = <400000>;
status = "okay";
--
2.43.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 6/6] arm64: dts: qcom: sm8450-hdk: Enable the A730 GPU
2023-11-27 16:20 ` [PATCH 6/6] arm64: dts: qcom: sm8450-hdk: Enable the A730 GPU Konrad Dybcio
@ 2023-11-30 9:54 ` Neil Armstrong
0 siblings, 0 replies; 14+ messages in thread
From: Neil Armstrong @ 2023-11-30 9:54 UTC (permalink / raw)
To: Konrad Dybcio, Will Deacon, Robin Murphy, Joerg Roedel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Andy Gross,
Bjorn Andersson
Cc: Marijn Suijten, Dmitry Baryshkov, linux-arm-kernel, iommu,
devicetree, linux-kernel, linux-arm-msm
On 27/11/2023 17:20, Konrad Dybcio wrote:
> Enable the GPU and provide a path for the ZAP blob.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> index 20153d08edde..a20d5d76af35 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> @@ -580,6 +580,14 @@ &dispcc {
> status = "okay";
> };
>
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + firmware-name = "qcom/sm8450/a730_zap.mbn";
> + };
> +};
> +
> &i2c9 {
> clock-frequency = <400000>;
> status = "okay";
>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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^ permalink raw reply [flat|nested] 14+ messages in thread