From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v3 12/13] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests
Date: Mon, 27 Nov 2023 11:45:58 +0000 [thread overview]
Message-ID: <20231127114559.990314-13-maz@kernel.org> (raw)
In-Reply-To: <20231127114559.990314-1-maz@kernel.org>
We can now expose ID_AA64MMFR4_EL1 to guests, and let NV guests
understand that they cannot really switch HCR_EL2.E2H to 0 on
some platforms.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/nested.c | 4 ++++
arch/arm64/kvm/sys_regs.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 042695a210ce..3885f1c93979 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -137,6 +137,10 @@ void access_nested_id_reg(struct kvm_vcpu *v, struct sys_reg_params *p,
val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001);
break;
+ case SYS_ID_AA64MMFR4_EL1:
+ val &= NV_FTR(MMFR4, E2H0);
+ break;
+
case SYS_ID_AA64DFR0_EL1:
/* Only limited support for PMU, Debug, BPs and WPs */
val &= (NV_FTR(DFR0, PMUVer) |
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 9f76f24b96f8..ff2e66f0bda1 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2197,7 +2197,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
ID_AA64MMFR2_EL1_NV |
ID_AA64MMFR2_EL1_CCIDX)),
ID_SANITISED(ID_AA64MMFR3_EL1),
- ID_UNALLOCATED(7,4),
+ ID_SANITISED(ID_AA64MMFR4_EL1),
ID_UNALLOCATED(7,5),
ID_UNALLOCATED(7,6),
ID_UNALLOCATED(7,7),
--
2.39.2
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next prev parent reply other threads:[~2023-11-27 11:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 11:45 [PATCH v3 00/13] arm64: Add support for FEAT_E2H0, or lack thereof Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 01/13] arm64: Add macro to compose a sysreg field value Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 02/13] arm64: cpufeatures: Correctly handle signed values Marc Zyngier
2023-12-11 12:24 ` Will Deacon
2024-01-08 17:46 ` Marc Zyngier
2024-01-09 11:40 ` Marc Zyngier
2024-01-30 11:34 ` Will Deacon
2023-11-27 11:45 ` [PATCH v3 03/13] arm64: cpufeature: Correctly display signed override values Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 04/13] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 05/13] arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 06/13] arm64: cpufeature: Detect E2H0 not being implemented Marc Zyngier
2023-12-11 12:42 ` Will Deacon
2024-01-09 15:16 ` Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 07/13] arm64: cpufeature: Detect HCR_EL2.NV1 being RES0 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 08/13] arm64: Treat HCR_EL2.E2H as RES1 when ID_AA64MMFR4_EL1.E2H0 is negative Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 09/13] arm64: Add override for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 10/13] arm64: Add MIDR-based override infrastructure Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 11/13] arm64: Add MIDR-based overrides for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-27 11:45 ` Marc Zyngier [this message]
2023-11-27 11:45 ` [PATCH v3 13/13] KVM: arm64: Force guest's HCR_EL2.E2H RES1 when NV1 is not implemented Marc Zyngier
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