From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v3 01/13] arm64: Add macro to compose a sysreg field value
Date: Mon, 27 Nov 2023 11:45:47 +0000 [thread overview]
Message-ID: <20231127114559.990314-2-maz@kernel.org> (raw)
In-Reply-To: <20231127114559.990314-1-maz@kernel.org>
A common idiom is to compose a tupple (reg, field, val) into
a symbol matching an autogenerated definition.
Add a help performing the concatenation and replace it when
open-coded implementations exist.
Suggested-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 5 ++++-
arch/arm64/kvm/sys_regs.c | 3 ++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 5e65f51c10d2..3cb18c7a1ef0 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1156,6 +1156,8 @@
par; \
})
+#define SYS_FIELD_VALUE(reg, field, val) reg##_##field##_##val
+
#define SYS_FIELD_GET(reg, field, val) \
FIELD_GET(reg##_##field##_MASK, val)
@@ -1163,7 +1165,8 @@
FIELD_PREP(reg##_##field##_MASK, val)
#define SYS_FIELD_PREP_ENUM(reg, field, val) \
- FIELD_PREP(reg##_##field##_MASK, reg##_##field##_##val)
+ FIELD_PREP(reg##_##field##_MASK, \
+ SYS_FIELD_VALUE(reg, field, val))
#endif
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 4735e1b37fb3..9f76f24b96f8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1561,7 +1561,8 @@ static u64 read_sanitised_id_aa64pfr0_el1(struct kvm_vcpu *vcpu,
u64 __f_val = FIELD_GET(reg##_##field##_MASK, val); \
(val) &= ~reg##_##field##_MASK; \
(val) |= FIELD_PREP(reg##_##field##_MASK, \
- min(__f_val, (u64)reg##_##field##_##limit)); \
+ min(__f_val, \
+ (u64)SYS_FIELD_VALUE(reg, field, limit))); \
(val); \
})
--
2.39.2
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next prev parent reply other threads:[~2023-11-27 11:46 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 11:45 [PATCH v3 00/13] arm64: Add support for FEAT_E2H0, or lack thereof Marc Zyngier
2023-11-27 11:45 ` Marc Zyngier [this message]
2023-11-27 11:45 ` [PATCH v3 02/13] arm64: cpufeatures: Correctly handle signed values Marc Zyngier
2023-12-11 12:24 ` Will Deacon
2024-01-08 17:46 ` Marc Zyngier
2024-01-09 11:40 ` Marc Zyngier
2024-01-30 11:34 ` Will Deacon
2023-11-27 11:45 ` [PATCH v3 03/13] arm64: cpufeature: Correctly display signed override values Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 04/13] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 05/13] arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 06/13] arm64: cpufeature: Detect E2H0 not being implemented Marc Zyngier
2023-12-11 12:42 ` Will Deacon
2024-01-09 15:16 ` Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 07/13] arm64: cpufeature: Detect HCR_EL2.NV1 being RES0 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 08/13] arm64: Treat HCR_EL2.E2H as RES1 when ID_AA64MMFR4_EL1.E2H0 is negative Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 09/13] arm64: Add override for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 10/13] arm64: Add MIDR-based override infrastructure Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 11/13] arm64: Add MIDR-based overrides for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 12/13] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests Marc Zyngier
2023-11-27 11:45 ` [PATCH v3 13/13] KVM: arm64: Force guest's HCR_EL2.E2H RES1 when NV1 is not implemented Marc Zyngier
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